TSV6392A datasheet(5/25 Pages) STMICROELECTRONICS

5 / 25 page

TSV639x, TSV639xA

Electrical characteristics

Doc ID 16883 Rev 1

5/25

Electrical characteristics

Table 4.

Electrical characteristics at VCC+ = +1.8 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25° C,

and RL connected to VCC/2 (unless otherwise specified)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

DC performance

Vio

Offset voltage

TSV639x

TSV639xA

TSV6393AIST - MiniSO-10

0.8

Tmin < Top < Tmax - TSV639x

Tmin < Top < Tmax - TSV639xA

Tmin < Top < Tmax - TSV6393AIST

4.5

2.2

DVio

Input offset voltage drift

μV/°C

Iio

Input offset current

(Vout =VCC/2)

110(1)

Tmin < Top < Tmax

100

Iib

Input bias current

(Vout =VCC/2)

110(1)

Tmin < Top < Tmax

100

CMR

Common mode rejection

ratio 20 log (

ΔVic/ΔVio)

0 V to 1.8 V, Vout = 0.9 V

Tmin < Top < Tmax

Avd

Large signal voltage gain

RL= 10 kΩ, Vout = 0.5 V to 1.3 V

Tmin < Top < Tmax

VOH

High level output voltage

RL =10kΩ

Tmin < Top < Tmax

VOL

Low level output voltage

RL =10kΩ

Tmin < Top < Tmax

435

Iout

Isink

Vo = 1.8 V

Tmin < Top < Tmax

Isource

Vo = 0 V

Tmin < Top < Tmax

ICC

Supply current (per

operator)

No load, Vout =VCC/2

µA

Tmin < Top < Tmax

µA

AC performance

GBP

Gain bandwidth product

RL =10kΩ, CL = 100 pF

MHz

Gain

Minimum gain for stability

Phase margin = 60°, Rf = 10kΩ,

RL =10kΩ, CL =20 pF

-3

V/V

Slew rate

RL =10kΩ, CL = 100 pF, Vout =

0.5 V to 1.3 V

0.7

μs

Equivalent input noise

voltage

f = 1 kHz

f = 10 kHz

Guaranteed by design.

------------

TSV6392A 数据表(PDF) 5 Page - STMicroelectronics

TSV6392A 数据表(HTML) 5 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

数据表下载

链接网址

TSV6392A 数据表(PDF) 5 Page - STMicroelectronics

TSV6392A 数据表(HTML) 5 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

数据表 下载

链接网址

数据表下载