ZHCS2000 datasheet(5/19 Pages) ZETEX

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ZXSC100

ISSUE 1 - JANUARY 2001

DEVICE DESCRIPTION

The ZXSC100 is non-synchronous PFM, DC-DC

controller IC which, when combined with a high

performance external transistor, enables the

production of a high efficiency boost converter for use

in single cell applications. A block diagram is shown

for the ZXSC100 in Figure 1.

A shutdown circuit turns the device on or off at VCC=1V

with a hysteresis of typically 80mV. At start up,

comparator Comp1 turns the driver circuit and

therefore the external switching transistor on. This

circuit will remain active until the feedback voltage at

the pin FB rises above VREF, which is set to 730mV. An

external resistive divider on the FB pin sets the output

voltage level.

Comparator Comp2 forces the driver circuit and the

external switching transistor off, if the voltage at

ISENSE exceeds 25mV. The voltage at ISENSE is taken

from a current sense resistor connected in series with

the emitter of the switching transistor.

A monostable following the output of Comp2 extends

the turn-off time of the output stage by a minimum of

2us. This ensures that there is sufficient time to

discharge the inductor coil before the next on period.

The AND gate between the monostable and Comp1

output ensures that the switching transistor always

remains on until the ISENSE threshold is reached and

that the minimum discharge period is always

asserted. The pulse width is constant, the pulse

frequency varies with the output load.

The driver circuit supplies the external switching

transistor with a defined

current, which is

programmed by an external resistor connected

between the RE pin and VCC. The internal reference

voltage for the circuit is 25mV below VCC. To maximise

efficiency the external transistor is switched quickly,

typically being forced off within 20ns.

In higher power applications more current can be

supplied to the switching transistor by using a further

external component. The driver transistor in the IC can

be bypassed with the addition of a discrete PNP. More

information on this circuit configuration can be found

in the applications section.

Figure 1

ZXSC100 Block Diagram

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