MAX9867 datasheet(21/55 Pages) MAXIM

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Detailed Description

The MAX9867 is a low-power stereo audio codec

designed for portable applications requiring minimum

power consumption.

The stereo playback path accepts digital audio through

a flexible interface compatible with I2S, TDM, and left-

justified signals. An oversampling sigma-delta DAC

converts the incoming digital data stream to analog

audio and outputs the audio through the stereo head-

phone amplifier. The headphone amplifier can be con-

figured in differential, single-ended, and capacitorless

output modes.

The stereo record path has two analog microphone

inputs with selectable gain. An integrated microphone

bias can be used to power the microphones. The left

analog microphone inputs can also accept data from

up to two digital microphones. An oversampling sigma-

delta ADC converts the microphone signals and out-

puts the digital bit stream over the digital audio

interface.

Integrated digital filtering provides a range of notch and

highpass filters for both the playback and record paths

to limit undesirable low-frequency signals and GSM

transmission noise. The digital filtering provides attenuation

of out-of-band energy by over 70dB, eliminating audi-

ble aliasing. A digital sidetone function allows audio

from the record path to be summed into the playback

path after digital filtering.

The MAX9867 also includes two stereo, single-ended

line inputs with gain adjustment, which can be record-

ed by the ADCs and/or output by the headphone ampli-

fiers. An auxiliary ADC accurately measures a DC

voltage by utilizing the right audio ADC and reporting

the DC voltage through the I2C interface. A jack detec-

tion function allows the detection of headphone, micro-

phone, and headset jacks. Insertion and removal

events can be programmed to trigger a hardware inter-

rupt and flag an I2C register bit.

The MAX9867’s flexible clock circuitry utilizes a program-

mable clock divider and a digital PLL, allowing the DAC

and ADC to operate at maximum dynamic range for all

combinations of master clock (MCLK) and sample rate

(LRCLK) without consuming extra supply current. Any

master clock between 10MHz and 60MHz is supported

as are all sample rates from 8kHz to 48kHz. Master and

slave modes are supported for maximum flexibility.

Ultra-Low Power Stereo Audio Codec

______________________________________________________________________________________

Pin Description (continued)

PIN/BUMP

TQFN-EP

WLP

NAME

FUNCTION

LOUTP

Positive Left-Channel Headphone Output. Connect directly to the load in

differential and capacitorless mode. AC-couple to the load in single-ended mode.

PVDD

Headphone Power Supply. Bypass to PGND with a 1µF capacitor.

24, 25

—

N.C.

No Connection

DVDDIO

Digital Audio Interface Power Supply. Bypass to DGND with a 1µF capacitor.

SDOUT

Digital Audio Serial-Data ADC Output

SDIN

Digital Audio Serial-Data DAC Input

LRCLK

Digital Audio Left-Right Clock Input/Output. LRCLK is the audio sample rate clock

and determines whether the audio data on SDIN is routed to the left or right

channel. In TDM mode, LRCLK is a frame synchronization pulse. LRCLK is an

input when the MAX9867 is in slave mode and an output when in master mode.

BCLK

Digital Audio Bit Clock Input/Output. BCLK is an input when the MAX9867 is in

slave mode and an output when in master mode.

MCLK

Master Clock Input. Acceptable input frequency range: 10MHz to 60MHz.

DVDD

Digital Power Supply. Supply for the digital circuitry and I

2C interface. Bypass to

DGND with a 1µF capacitor.

—

Exposed Pad. Connect the exposed thermal pad to AGND.

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