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AS1520/AS1521

A 0.01µF bypass capacitor plus the internal 17k

Ω reference resistor at REFADJ form an R/C filter with a 170µs time

constant. To achieve full 10-bit accuracy, 7 time constants (1.4ms) are required after power-up if the bypass capacitor

is fully discharged between conversions. Waiting this 1.4ms in reduced-power mode instead of normal operation mode

can further reduce power consumption. This is achieved by using the sequence shown in Figure 30 on page 21.

Figure 31 on page 21 shows the AS1521 power consumption for conversions using full power-down mode (PD1 = PD0

= 0 (see Table 12), an external reference, and the maximum clock speed. One dummy conversion to power-up the

device is required, but no wait-time is necessary to start the second conversion, thereby achieving lower power con-

sumption up to the full sampling rate.

Figure 30. Full Power-Down Timing Waveforms (AS1521)

Figure 31. Average Supply Current vs. Sampling Rate (AS1521, FULLPD, and External Reference)

Reference

The AS1520/AS1521 can operate with the internal or an external reference.

Internal Reference

The internal reference is selected by placing a capacitor between REFADJ and GND. The internally trimmed 1.22V

bandgap voltage available at REFADJ is buffered with a gain of 2.045V/V to pin REF, where 2.5V are available. A

decoupling capacitor is needed at pin REF.

DIN

1

01

1

1

0

00

0

Full Power-

Down

Reduced-

Power Mode

REF

1

REFADJ

Full Power-

Down

1.22V

2.5V

2.2mA

2.2mA

2.2mA

2.5V

1.22V

0mA

0mA

0.4mA

Full Power-

Down

Normal Mode

Conversion

Normal Mode

Dummy

Conversion

Reduced

Power Mode

Normal Mode

Conversion

Full Power-

Down

1 Channel

0.1

100

100000

0.001

0.01

0.1

1

10

100

Sampling Rate (ksps)