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PIC16F688-I/ML 数据表(PDF) 73 Page - Microchip Technology |
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PIC16F688-I/ML 数据表(HTML) 73 Page - Microchip Technology |
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73 / 204 page  © 2009 Microchip Technology Inc. DS41203E-page 71 PIC16F688 8.2.6 ADC REGISTER DEFINITIONS The following registers are used to control the operation of the ADC. REGISTER 8-1: ADCON0: A/D CONTROL REGISTER 0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 ADFM VCFG — CHS2 CHS1 CHS0 GO/DONE ADON bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 ADFM: A/D Conversion Result Format Select bit 1 = Right justified 0 = Left justified bit 6 VCFG: Voltage Reference bit 1 = VREF pin 0 = VDD bit 5 Unimplemented: Read as ‘0’ bit 4-2 CHS<2:0>: Analog Channel Select bits 000 = AN0 001 = AN1 010 = AN2 011 = AN3 100 = AN4 101 = AN5 110 = AN6 111 = AN7 bit 1 GO/DONE: A/D Conversion Status bit 1 = A/D Conversion cycle in progress. Setting this bit starts an A/D Conversion cycle. This bit is automatically cleared by hardware when the A/D Conversion has completed. 0 = A/D Conversion completed/not in progress bit 0 ADON: ADC Enable bit 1 = ADC is enabled 0 = ADC is disabled and consumes no operating current REGISTER 8-2: ADCON1: A/D CONTROL REGISTER 1 U-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0 — ADCS2 ADCS1 ADCS0 — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 Unimplemented: Read as ‘0’ bit 6-4 ADCS<2:0>: A/D Conversion Clock Select bits 000 = FOSC/2 001 = FOSC/8 010 = FOSC/32 x11 = FRC (clock derived from a dedicated internal oscillator = 500 kHz max) 100 = FOSC/4 101 = FOSC/16 110 = FOSC/64 bit 3-0 Unimplemented: Read as ‘0’ |
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