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PIC18F2610-E/P 数据表(PDF) 49 Page - Microchip Technology

部件名 PIC18F2610-E/P
功能描述  28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  376 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC18F2610-E/P 数据表(HTML) 49 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS39636D-page 51
PIC18F2X1X/4X1X
TABLE 4-4:
INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable Devices
Power-on Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET
Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
TOSU
2410 2510 2515 2610 4410 4510 4515 4610
---0 0000
---0 0000
---0 uuuu(3)
TOSH
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
uuuu uuuu(3)
TOSL
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
uuuu uuuu(3)
STKPTR
2410 2510 2515 2610 4410 4510 4515 4610
00-0 0000
uu-0 0000
uu-u uuuu(3)
PCLATU
2410 2510 2515 2610 4410 4510 4515 4610
---0 0000
---0 0000
---u uuuu
PCLATH
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
uuuu uuuu
PCL
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
PC + 2(2)
TBLPTRU
2410 2510 2515 2610 4410 4510 4515 4610
--00 0000
--00 0000
--uu uuuu
TBLPTRH
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
uuuu uuuu
TBLPTRL
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
uuuu uuuu
TABLAT
2410 2510 2515 2610 4410 4510 4515 4610
0000 0000
0000 0000
uuuu uuuu
PRODH
2410 2510 2515 2610 4410 4510 4515 4610
xxxx xxxx
uuuu uuuu
uuuu uuuu
PRODL
2410 2510 2515 2610 4410 4510 4515 4610
xxxx xxxx
uuuu uuuu
uuuu uuuu
INTCON
2410 2510 2515 2610 4410 4510 4515 4610
0000 000x
0000 000u
uuuu uuuu(1)
INTCON2
2410 2510 2515 2610 4410 4510 4515 4610
1111 -1-1
1111 -1-1
uuuu -u-u(1)
INTCON3
2410 2510 2515 2610 4410 4510 4515 4610
11-0 0-00
11-0 0-00
uu-u u-uu(1)
INDF0
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
POSTINC0
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
POSTDEC0
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
PREINC0
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
PLUSW0
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
FSR0H
2410 2510 2515 2610 4410 4510 4515 4610
---- 0000
---- 0000
---- uuuu
FSR0L
2410 2510 2515 2610 4410 4510 4515 4610
xxxx xxxx
uuuu uuuu
uuuu uuuu
WREG
2410 2510 2515 2610 4410 4510 4515 4610
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF1
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
POSTINC1
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
POSTDEC1
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
PREINC1
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
PLUSW1
2410 2510 2515 2610 4410 4510 4515 4610
N/A
N/A
N/A
Legend:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
3:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
4:
See Table 4-3 for Reset value for specific condition.
5:
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.



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