F

2/96

INT201

3

Figure 4. Using the INT200 and INT201 in a 3-phase Configuration.

General Circuit Operation

One phase of a three-phase brushless

DC motor drive circuit is shown in Figure

4 to illustrate an application of the

INT200/201. The LS IN signal directly

controls MOSFET Q1. The

HSINsignal

causes the INT200 to command the

INT201 to turn MOSFET Q2 on or off as

required. The INT200 will ignore input

signals that would command both Q1

and Q2 to conduct simultaneously,

protecting against shorting the HV+ bus

to HV-.

Local bypassing for the low-side driver

is provided by C1. Bootstrap bias for the

high-side driver is provided by D1 and

C2. Slew rate and effects of parasitic

oscillations in the load waveforms are

controlled by resistors R1 and R2.

The inputs are designed to be compatible

with 5 V CMOS logic levels and should

not be connected to V

power supply sequencing should be

observed. The order of signal application

should be V

HV+.

The INT201 is latched on and off by the

edges of the appropriate low-side logic

signal (

HS INfor the INT200 and HS IN

for the INT202). The high-side driver

will latch off and stay off if the bootstrap

capacitor discharges below the

undervoltage lockout threshold.

Undervoltage lockout-induced turn off

can occur during conditions such as

power ramp up, motor start, or low speed

operation.

Figure 5. High-side On Time versus Bootstrap Capacitor.

PI-1467-042695

HV+

VDD

LS IN

HV-

INT201

INT200

PHASE 1

PHASE 2

PHASE 3

3-PHASE

BRUSHLESS

DC MOTOR

D1

C1

C2

R1

R2

Q2

Q1

HS IN

12

34

87

65

12

34

87

65

1000

0.1

0.01

0.01

0.1

1

10

100

High Side ON Time (ms)

1

100

10

QG = 20 nC

QG = 100 nC