TS5A2053

SINGLECHANNEL 10 W SPDT ANALOG SWITCH

WITH ENABLE

SCDS183A – JANUARY 2005 – REVISED APRIL 2006

www.ti.com

9

V+ = 1.65 V to 1.95 V, TA = −40°C to 85°C (unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

TA

V+

MIN

TYP

MAX

UNIT

Analog Switch

Analog signal range

VCOM,

VNO,VNC

0

V+

V

ON-state

ron

0

≤ (VNO or VNC) ≤ V+,

Switch ON,

25

°C

1.65 V

85

Ω

ON-state

resistance

ron

0

≤ (VNO or VNC) ≤ V+,

ICOM = −4 mA,

Switch ON,

See Figure 13

Full

1.65 V

120

Ω

ON-state

resistance match

∆ron

VNO or VNC = 1.15 V,

Switch ON,

25

°C

1.65 V

2

Ω

resistance match

between channels

∆ron

VNO or VNC = 1.15 V,

ICOM = −4 mA,

Switch ON,

See Figure 13

Full

1.65 V

7.5

Ω

ON-state

ron(flat)

0

≤ (VNO or VNC) ≤ V+,

Switch ON,

25

°C

1.65 V

76

Ω

ON-state

resistance flatness

ron(flat)

0

≤ (VNO or VNC) ≤ V+,

ICOM = −4 mA,

Switch ON,

See Figure 13

Full

1.65 V

100

Ω

NO, NC

OFF leakage

INO(OFF),

VNO or VNC = 0.3 V,

VCOM = 1.65 V,

or

Switch OFF,

25

°C

1.95 V

–100

3.5

100

nA

OFF leakage

current

INO(OFF),

INC(OFF)

VCOM = 1.65 V,

or

VNO or VNC = 1.65 V,

VCOM = 0.3 V,

Switch OFF,

See Figure 14

Full

1.95 V

–200

200

nA

COM

OFF leakage

ICOM(OFF)

VCOM = 0.3 V, VNO = 1.65 V,

or

Switch OFF,

25

°C

1.95 V

–100

1

100

nA

OFF leakage

current

ICOM(OFF)

COM

NO

or

VCOM = 1.65 V, VNO = 0.3 V,

Switch OFF,

See Figure 14

Full

1.95 V

–200

200

nA

NO, NC

INO(ON),

VNO or VNC = 0.3 V,

VCOM = Open,

or

Switch ON,

25

°C

1.95 V

–100

4

100

nA

NO, NC

ON leakage current

INO(ON),

INC(ON)

VCOM = Open,

or

VNO or VNC = 1.65 V,

VCOM = Open,

Switch ON,

See Figure 15

Full

1.95 V

–200

200

nA

COM

ICOM(ON)

VCOM = 0.3 V,

VNO or VNC = Open,

or

Switch ON,

25

°C

1.95 V

–100

1

100

nA

COM

ON leakage current

ICOM(ON)

VNO or VNC = Open,

or

VCOM = 1.65 V,

VNO or VNC = Open,

Switch ON,

See Figure 15

Full

1.95 V

–200

200

nA

Digital Control Inputs (IN, EN)

Input logic high

VIH

Full

V+ × 0.65

5.5

V

Input logic low

VIL

Full

0

V+ × 0.35

V

Input leakage

IIH, IIL

VI = 5.5 V or 0

25

°C

1.95 V

−0.1

0.05

0.1

A

Input leakage

current

IIH, IIL

VI = 5.5 V or 0

Full

1.95 V

−1

1

µA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum