| 数据搜索系统,热门电子元器件搜索 |
|
ADM1034 数据表(PDF) 21 Page - ON Semiconductor |
|
|
|||||||||||||||||||||||||||||
ADM1034 数据表(HTML) 21 Page - ON Semiconductor |
|
21 / 39 page ![]() ADM1034 http://onsemi.com 21 The user can also configure the THERM pin to be pulled low as an output whenever the Remote 1 temperature exceeds the Remote 1 THERM limit. Set the Enable Remote 1 THERM events bit (Bit 1) of Configuration Register 4 (Address 0x04). The last option is to configure the THERM pin to be pulled low as an output whenever the Remote 2 temperature exceeds the Remote 2 THERM limit. Set the Enable Remote 2 THERM events bit (Bit 2) of Configuration Register 4 (Address 0x04). THERM % Limit Register The THERM % limit is programmed to Register 0x19. An ALERT is generated, if THERM is asserted for longer than the programmed percentage limit. The limit is programmed as a percentage of the chosen time window. THERM % limit register is an 8−bit register. 0x00 = 0% 0xFF = 100% Therefore, 1 LSB = 0.39%. Example: If a time window of 8 seconds is chosen, and an ALERT is to be generated if THERM is asserted for more than 1 second, program the following value to the limit register: % Limit = 1/8 x 100 = 12.5% 12.5% / 0.39% = 32d = 0x20 = 0010 0000 An ALERT is generated if the THERM limit is exceeded after the time window has elapsed, assuming it is not masked. Fan Drive Signal The ADM1034 contols the speed of up to two cooling fans. Varying the duty cycle (on/off time) of a square wave applied to the fan varies the speed of the fan. The ADM1034 uses a control method called synchronous speed control, in which the PWM drive signal applied to the fan is synchronized with the fan’s TACH signal. See the Synchronous Speed Control section for more information. The external circuitry required to drive the fan is very simple. A single N−channel MOSFET is the only drive device required. The specifications of the MOSFET depend on the maximum current required by the fan and the gate voltage drive (VGS < 3.0 V for direct interfacing to the drive pin). VGS can be greater than 3.0 V, as long as the pullup on the gate is tied to 5.0 V. The MOSFET should also have a low on−resistance to ensure that there is no significant voltage drop across the FET. A high on−resistance reduces the voltage applied across the fan and therefore the maximum operating speed of the fan. Figure 33 shows a scheme for driving a 3−wire fan. Figure 33. Interfacing a 3−Wire Fan to the ADM1034 by Using an N−Channel MOSFET 12V 12V FAN 1N4148 Q1 NDT3055L ADM1034 DRIVE TACH TACH 3.3V 100kΩ 10kΩ 10kΩ 4.7kΩ 12V Figure 33 uses a 10 k W pullup resistor for the TACH signal. This assumes that the TACH signal is an open collector from the fan. In all cases, the fan’s TACH signal must be kept below 5.0 V maximum to prevent damaging the ADM1034. If in doubt as to whether a fan has an open−collector or totem pole TACH output, use one of the input signal conditioning circuits shown in the Fan Inputs section. When designing drive circuits with transistors and FETs, make sure that the drive pins are not required to source current and that they sink less than the maximum current specified here. Synchronous Speed Control The ADM1034 drives the fan by using a control scheme called synchronous speed control. In this scheme, the PWM drive signal applied to the fan is synchronized with the TACH signal. Accurate and repeatable fan speed measurements are the main benefits. The fan is allowed to run reliably at speeds as low as 30 percent of the full capability. The drive signal applied to the fan is synchronized with the TACH signal. The ADM1034 switches on the drive signal and waits for a transition on the TACH signal. When a transition takes place on the TACH signal, the PWM drive is switched off for a period of time called toff. The drive signal is then switched on again. The toff time is varied in order to vary the fan speed. If the fan is running too fast, the toff time is increased. If the fan is running too slow, the toff time is decreased. Since the drive signal is synchronized with the TACH signal, the frequency with which the fan is driven depends on the current speed of the fan and the number of poles in it. Figure 34 shows how the synchronous speed drive signal works. The ideal TACH signal is the TACH signal that would be output from the fan if power were applied 100 percent of the time. It is representative of the actual speed of the fan. The actual TACH signal is the signal the user would see on the TACH output from the fan if the user were to put a scope on it. In effect, the actual TACH signal is the ideal TACH signal chopped with the drive signal. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |