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CAT310 数据表(PDF) 3 Page - ON Semiconductor |
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CAT310 数据表(HTML) 3 Page - ON Semiconductor |
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3 / 10 page ![]() CAT310 http://onsemi.com 3 Electrical Operating Characteristics Table 3. DC CHARACTERISTICS (VCC = 5.0 V, −40°C ≤ TA ≤ 125°C, over recommended operating conditions unless specified otherwise.) Symbol Name Conditions Min Typ Max Units ISTBY Standby Quiescent Current Static input signal. All outputs turned off. 1 10 mA VOVP VBATT Over Voltage Protection Trigger threshold 17 19 21 V VUVLO VCC Under Voltage Lockout Trigger threshold 1.7 2.5 V RSW Switch on resistance for OUT0 to OUT9 IO(n) = 30 mA 2 5 12 W IO(n)LKG OUT0 to OUT9 Output Switch Leakage V(OUT(n)) = 15 V 0.1 10 mA IXLAT XLAT Internal Pull−down current XLAT = VCC XLAT = 0.3 V 4 1 10 3 30 6 mA IBLANK BLANK Internal Pull−up current BLANK = 0 V BLANK = VCC − 0.3 V 4 1 10 3 30 6 mA VIH VIL Logic high input voltage Logic low input voltage 0.3 VCC 0.7 VCC V IIL Logic Input leakage current (SCLK, SIN) VI = VCC or GND −5 0 5 mA VOH VOL SOUT logic high output voltage SOUT logic low output voltage IOH = −1 mA IOL = 1 mA VCC −0.3 V 0.3 V Table 4. SWITCHING CHARACTERISTICS (VCC = 5.0 V, −40°C ≤ TA ≤ 125°C, over recommended operating conditions unless specified otherwise.) Symbol Name Conditions Min Typ Max Units SCLK fSCLK SCLK Clock Frequency 10 MHz twh/wl SCLK Pulse width High or Low 30 ns SIN tsu Setup time SIN to SCLK 10 ns th Hold time SIN to SCLK 10 ns XLAT tw XLAT Pulse width SIN to SCLK 20 ns th Hold time SCLK to XLAT 20 ns tr SOUT rise time (10% to 90%) CL = 15 pF 20 ns tf SOUT fall time (90% to 10%) CL = 15 pF 15 ns tpd Propagation delay time Blank ↑ to OUT(n) 25 ns tpd Propagation delay time Blank ↓ to OUT(n) 25 ns tpd Propagation delay time SCLK to SOUT 25 ns 1. All logic inputs contain Schmitt trigger inputs. |
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