| 数据搜索系统,热门电子元器件搜索 |
|
STA015B 数据表(PDF) 46 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STA015B 数据表(HTML) 46 Page - STMicroelectronics |
|
46 / 56 page ![]() Obsolete Product(s) - Obsolete Product(s) STA015 46/56 6.3 TIMING DIAGRAMS 6.3.1 Audio DAC Interface a) OCLK in output. The audio PLL is used to clock the DAC tsdo = 3.5 + pad_timing (Cload_SDO) - pad_timing (Cload_ OCLK) tsckt = 4 + pad_timing (Cload_SCKT) - pad_timing (Cload_ OCLK) tlrckt = 3.5 + pad_timing (Cload_LRCCKT) - pad_timing (Cload_ OCLK) Pad-timing versus load Cload_XXX is the load in pF on the XXX output. pad_timing (Cload_XXX) is the propagation delay added to the XXX pad due to the load. b) OCLK in input. Load (pF) Pad_timing 25 2.90ns 50 3.82ns 75 4.68ns 100 5.52ns OCLK (OUTPUT) SDO SCKT LRCLK tsdo tsckt tlrclk D98AU969 OCLK (INPUT) SDO SCKT LRCLK tsdo tsckt tlrclk D98AU970 thi tlo toclk |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |