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68HC705RC17 数据表(PDF) 21 Page - Freescale Semiconductor, Inc

部件名 68HC705RC17
功能描述  Genneral Release Specification
PDF  126 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

68HC705RC17 数据表(HTML) 21 Page - Freescale Semiconductor, Inc

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General Description
Signal Description
MC68HC705RC17 — Rev. 2.0
General Release Specification
General Description
An external clock should be applied to the OSC1 input with the OSC2 pin
not connected (see Figure 1-4 (b)). This setup can be used if the user
does not want to run the CPU with a crystal.
NOTE:
The PLL design requires a 32.768-kHz external frequency for proper
operation.
Figure 1-4. Oscillator Connections
1.5.4 RESET
This active-low pin is used to reset the MCU to a known startup state by
pulling RESET low. The RESET pin contains an internal Schmitt trigger
as part of its input to improve noise immunity. See Section 5. Resets.
1.5.5 LPRST
The LPRST pin is an active-low pin and is used to put the MCU into low-
power reset mode. In low-power reset mode the MCU is held in reset
with all processor clocks halted. See Section 5. Resets.
<
OSC1
OSC2
OSC1
OSC2
MCU
MCU
EXTERNAL CLOCK
UNCONNECTED
(a) Crystal/Ceramic Resonator
(b) External Clock Source
10 M
Ω
Oscillator Connections
Connections
30 pF
30 pF
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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