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P912XDP512F0MPVR 数据表(PDF) 291 Page - Freescale Semiconductor, Inc

部件名 P912XDP512F0MPVR
功能描述  HCS12X Microcontrollers
PDF  1348 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

P912XDP512F0MPVR 数据表(HTML) 291 Page - Freescale Semiconductor, Inc

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Chapter 6 XGATE (S12XGATEV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
291
6.9
Initialization and Application Information
6.9.1
Initialization
The recommended initialization of the XGATE is as follows:
1. Clear the XGE bit to suppress any incoming service requests.
2. Make sure that no thread is running on the XGATE. This can be done in several ways:
a) Poll the XGCHID register until it reads $00. Also poll XGDBG and XGSWEIF to make sure
that the XGATE has not been stopped.
b) Enter Debug Mode by setting the XGDBG bit. Clear the XGCHID register. Clear the XGDBG
bit.
The recommended method is a).
3. Set the XGVBR register to the lowest address of the XGATE vector space.
4. Clear all Channel ID flags.
5. Copy XGATE vectors and code into the RAM.
6. Initialize the S12X_INT module.
7. Enable the XGATE by setting the XGE bit.
The following code example implements the XGATE initialization sequence.
6.9.2
Code Example (Transmit "Hello World!" on SCI)
CPU
S12X
;###########################################
;#
SYMBOLS
#
;###########################################
SCI_REGS
EQU
$00C8
;SCI register space
SCIBDH
EQU
SCI_REGS+$00
;SCI Baud Rate Register
SCIBDL
EQU
SCI_REGS+$00
;SCI Baud Rate Register
SCICR2
EQU
SCI_REGS+$03
;SCI Control Register 2
SCISR1
EQU
SCI_REGS+$04
;SCI Status
Register 1
SCIDRL
EQU
SCI_REGS+$07
;SCI Control Register 2
TIE
EQU
$80
;TIE bit mask
TE
EQU
$08
;TE bit mask
RE
EQU
$04
;RE bit mask
SCI_VEC
EQU
$D6
;SCI vector number
INT_REGS
EQU
$0120
;S12X_INT register space
INT_CFADDR
EQU
INT_REGS+$07
;Interrupt Configuration Address Register
INT_CFDATA
EQU
INT_REGS+$08
;Interrupt Configuration Data Registers
RQST
EQU
$80
;RQST bit mask
XGATE_REGS
EQU
$0380
;XGATE register space
XGMCTL
EQU
XGATE_REGS+$00
;XGATE Module Control Register
XGMCTL_CLEAR
EQU
$FA02
;Clear all XGMCTL bits
XGMCTL_ENABLE
EQU
$8282
;Enable XGATE
XGCHID
EQU
XGATE_REGS+$02
;XGATE Channel ID Register
XGVBR
EQU
XGATE_REGS+$06
;XGATE ISP Select Register
XGIF
EQU
XGATE_REGS+$08
;XGATE Interrupt Flag Vector



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