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P912XDP512F0MPVR 数据表(PDF) 446 Page - Freescale Semiconductor, Inc

部件名 P912XDP512F0MPVR
功能描述  HCS12X Microcontrollers
PDF  1348 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

P912XDP512F0MPVR 数据表(HTML) 446 Page - Freescale Semiconductor, Inc

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12XDP512 Data Sheet, Rev. 2.21
446
Freescale Semiconductor
Figure 10-24 shows the common 13-byte data structure of receive and transmit buffers for extended
identifiers. The mapping of standard identifiers into the IDR registers is shown in Figure 10-25.
All bits of the receive and transmit buffers are ‘x’ out of reset because of RAM-based implementation1.
All reserved or unused bits of the receive and transmit buffers always read ‘x’.
1 Not applicable for receive buffers
2 Read-only for CPU
3 Read-only for CPU
1. Exception: The transmit priority registers are 0 out of reset.



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