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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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P912XDP512F0MPVR 数据表(PDF) 572 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 572 Page - Freescale Semiconductor, Inc |
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572 / 1348 page  Chapter 15 Background Debug Module (S12XBDMV2) MC9S12XDP512 Data Sheet, Rev. 2.21 572 Freescale Semiconductor 15.2 External Signal Description A single-wire interface pin called the background debug interface (BKGD) pin is used to communicate with the BDM system. During reset, this pin is a mode select input which selects between normal and special modes of operation. After reset, this pin becomes the dedicated serial interface pin for the background debug mode. 15.3 Memory Map and Register Definition 15.3.1 Module Memory Map Table 15-1 shows the BDM memory map when BDM is active. Table 15-1. BDM Memory Map Global Address Module Size (Bytes) 0x7FFF00–0x7FFF0B BDM registers 12 0x7FFF0C–0x7FFF0E BDM firmware ROM 3 0x7FFF0F Family ID (part of BDM firmware ROM) 1 0x7FFF10–0x7FFFFF BDM firmware ROM 240 |
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