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P912XDP512F0MPVR 数据表(PDF) 635 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 635 Page - Freescale Semiconductor, Inc |
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635 / 1348 page ![]() Chapter 17 Memory Mapping Control (S12XMMCV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 635 Figure 17-22. BDMGPR Address Mapping 17.4.2.3 Implemented Memory Map The global memory spaces reserved for the internal resources (RAM, EEPROM, and FLASH) are not determined by the MMC module. Size of the individual internal resources are however fixed in the design of the device cannot be changed by the user. Please refer to the Device User Guide for further details. Figure 17-23 and Table 17-20 show the memory spaces occupied by the on-chip resources. Please note that the memory spaces have fixed top addresses. Table 17-19. Global Implemented Memory Space Internal Resource Bottom Address Top Address Registers $00_0000 $00_07FF RAM $10_0000 minus RAMSIZE1 1 RAMSIZE is the hexadecimal value of RAM SIZE in bytes $0F_FFFF EEPROM $14_0000 minus EEPROMSIZE2 2 EEPROMSIZE is the hexadecimal value of EEPROM SIZE in bytes $13_FFFF FLASH $80_0000 minus FLASHSIZE3 3 FLASHSIZE is the hexadecimal value of FLASH SIZE in bytes $7F_FFFF Bit16 Bit0 Bit15 Bit22 BDM Local Address BDMGPR Register [6:0] Global Address [22:0] Bit16 Bit0 Bit15 Bit22 CPU Local Address BDMGPR Register [6:0] Global Address [22:0] BDM HARDWARE COMMAND BDM FIRMWARE COMMAND |
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