P912XDP512F0MPVR datasheet(667/1348 Pages) FREESCALE

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Chapter 18 Memory Mapping Control (S12XMMCV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

667

18.3.2.8

Program Page Index Register (PPAGE)

Read: Anytime

Write: Anytime

These eight index bits are used to page 16 KByte blocks into the Flash page window located in the local

(CPU or BDM) memory map from address 0x8000 to address 0xBFFF (see Figure 18-16). This supports

accessing up to 4 Mbytes of Flash (in the Global map) within the 64 KByte Local map. The PPAGE age

index register is effectively used to construct paged Flash addresses in the Local map format. The CPU has

special access to read and write this register directly during execution of CALL and RTC instructions. .

CAUTION

XGATE write access to this register during an CPU access which makes use

of this register could lead to unexpected results.

Figure 18-16. PPAGE Address Mapping

NOTE

Writes to this register using the special access of the CALL and RTC

instructions will be complete before the end of the instruction execution.

Address: 0x0030

76543210

PIX7

PIX6

PIX5

PIX4

PIX3

PIX2

PIX1

PIX0

Reset

11111110

Figure 18-15. Program Page Index Register (PPAGE)

Bit14

Bit0

Address [13:0]

PPAGE Register [7:0]

Global Address [22:0]

Bit13

Bit21

Address: CPU Local Address

or BDM Local Address

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