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P912XDP512F0MPVR 数据表(PDF) 709 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 709 Page - Freescale Semiconductor, Inc |
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709 / 1348 page ![]() Chapter 19 S12X Debug (S12XDBGV2) Module MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 711 19.3.1.11.2 Debug Comparator Address High Register (DBGXAH) Read: Anytime Write: Anytime when DBG not armed. 19.3.1.11.3 Debug Comparator Address Mid Register (DBGXAM) Read: Anytime Write: Anytime when DBG not armed. 0x0029 76543210 R0 Bit 22 21 20 19 18 17 Bit 16 W Reset 00000000 Unimplemented or Reserved Figure 19-15. Debug Comparator Address High Register (DBGXAH) Table 19-29. DBGXAH Field Descriptions Field Description 6–0 Bits [22:16] Comparator Address High Compare Bits — The comparator address high compare bits control whether the selected comparator will compare the address bus bits [22:16] to a logic 1 or logic 0. This register byte is ignored for XGATE compares. 0 Compare corresponding address bit to a logic 0 1 Compare corresponding address bit to a logic 1 0x002A 76543210 R Bit 15 14 13 12 11 10 9 Bit 8 W Reset 00000000 Figure 19-16. Debug Comparator Address Mid Register (DBGXAM) Table 19-30. DBGXAM Field Descriptions Field Description 7–0 Bits [15:8] Comparator Address Mid Compare Bits — The comparator address mid compare bits control whether the selected comparator will compare the address bus bits [15:8] to a logic 1 or logic 0. 0 Compare corresponding address bit to a logic 0 1 Compare corresponding address bit to a logic 1 |
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