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P912XDP512F0MPVR 数据表(PDF) 801 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 801 Page - Freescale Semiconductor, Inc |
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801 / 1348 page  Chapter 21 External Bus Interface (S12XEBIV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 803 21.5.2 Emulation Modes In emulation mode applications, the development systems use a custom PRU device to rebuild the single-chip or expanded bus functions which are lost due to the use of the external bus with an emulator. Accesses to a set of registers controlling the related ports in normal modes (refer to SoC section) are directed to the external bus in emulation modes which are substituted by PRR as part of the PRU. Accesses to these registers take a constant time of 2 cycles. Depending on the setting of ROMON and EROMON (refer to S12X_MMC section), the program code can be executed from internal memory or an optional external emulation memory (EMULMEM). No wait state operation (stretching) of the external bus access is done in emulation modes when accessing internal memory or emulation memory addresses. In both modes observation of the internal operation is supported through the external bus (internal visibility). |
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