P912XDP512F0MPVR datasheet(858/1348 Pages) FREESCALE

部件名	P912XDP512F0MPVR

功能描述	HCS12X Microcontrollers

PDF	1348 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

标志

858 / 1348 page

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

860

Freescale Semiconductor

22.3.2.45 Port P Interrupt Flag Register (PIFP)

Read: Anytime.

Write: Anytime.

Each flag is set by an active edge on the associated input pin. This could be a rising or a falling edge based

on the state of the PPSP register. To clear this flag, write logic level “1” to the corresponding bit in the

PIFP register. Writing a “0” has no effect.

76543210

PIFP7

PIFP6

PIFP5

PIFP4

PIFP3

PIFP2

PIFP1

PIFP0

Reset

00000000

Figure 22-47. Port P Interrupt Flag Register (PIFP)

Table 22-44. PIFP Field Descriptions

Field

Description

7–0

PIFP[7:0]

Interrupt Flags Port P

0 No active edge pending. Writing a “0” has no effect.

1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set).

Writing a logic level “1” clears the associated ﬂag.

P912XDP512F0MPVR 数据表(PDF) 858 Page - Freescale Semiconductor, Inc