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CMPWR150 数据表(PDF) 10 Page - ON Semiconductor |
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CMPWR150 数据表(HTML) 10 Page - ON Semiconductor |
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10 / 15 page ![]() CMPWR150 Rev. 3 | Page 10 of 15 | www.onsemi.com V OUT offset = 3.3V, V CC offset = 4.3V PowerUpVaux30v.bmp Figure 8. V CC Power-up (VAUX = 3.0V) V CC Power-down (VAUX = 3.3V). Figure 9 shows the output response as V CC approaches the deselect threshold during a power-down transition. V AUX of 3.3V remains present. When VCC reaches the deselect threshold (4.1V), the regulator turns off. This causes a step change reduction in V CC current resulting in a small voltage increase at the V CC input. This disturbance is approximately 100mV and the built-in hysteresis of 250mV ensures the regulator remains disabled throughout the transient. The output voltage experiences a disturbance of approximately 100mV during the transition. V OUT offset = 3.3V, V CC offset = 4.3V PowerDwnVaux33v.bmp Figure 9. V CC Power-down (VAUX = 3.3V) Load Step Response. Figure 10 shows the output response of the regulator during a step load change from 5mA to 500mA (represented on Ch1). An initial transient overshoot of 50mV occurs and the output settles to its final voltage within a few microseconds. The dc voltage disturbance on the output is approximately 75mV, which demonstrates the regulator output impedance of 0.15 Ω. V OUT offset = 3.3V |
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