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FEATURES

3

2

4

6

1

In1

In2

Y

GND

In0

DBV PACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOM VIEW)

DCK PACKAGE

(TOP VIEW)

3

2

4

6

1

In1

In2

Y

GND

In0

3

2

4

6

1

In1

In2

Y

GND

In0

In1

In0

In2

Y

GND

DRL PACKAGE

(TOP VIEW)

See mechanical drawings for dimensions.

1

4

2

3

6

5

5

5

5

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G97

CONFIGURABLE MULTIPLE-FUNCTION GATE

SCES416J – DECEMBER 2002 – REVISED JANUARY 2007

• Available in the Texas Instruments

• Latch-Up Performance Exceeds 100 mA Per

NanoFree™ Package

JESD 78, Class II

• Supports 5-V V

• ESD Protection Exceeds JESD 22

• Inputs Accept Voltages to 5.5 V

–

2000-V Human-Body Model (A114-A)

• Max t

–

200-V Machine Model (A115-A)

• Low Power Consumption, 10-µA Max I

CC

–

1000-V Charged-Device Model (C101)

• ±24-mA Output Drive at 3.3 V

• Choose From Nine Specific Logic Functions

• I

Operation

The SN74LVC1G97 features configurable multiple functions. The output state is determined by eight patterns of

3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All

This device functions as an independent gate, but because of Schmitt action, it may have different input

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC1G97YZPR

_ _ _CS_

0.23-mm Large Bump – YZP (Pb-free)

SOT (SOT-23) – DBV

Reel of 3000

SN74LVC1G97DBVR

C97_

–40°C to 85°C

SOT (SC-70) – DCK

Reel of 3000

SN74LVC1G97DCKR

CS_

SOT (SOT-563) – DRL

Reel of 4000

SN74LVC1G97DRLR

CS_

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2002–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.