SN74LVC2G08DCTRG4 datasheet(1/14 Pages) TI

部件名	SN74LVC2G08DCTRG4

功能描述	DUAL 2-INPUT POSITIVE-AND GATE

PDF	14 Pages

Scroll/Zoom	100%

制造商	TI [Texas Instruments]

网页	http://www.ti.com

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1 / 14 page

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FEATURES

Seemechanicaldrawingsfordimensions.

DCTPACKAGE

(TOP VIEW)

DCUPACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOMVIEW)

1

V

CC

8

1A

2

7

1B

1Y

3

6

2Y

2B

4

5

GND

2A

3

6

2B

2Y

8

1

V

CC

1A

5

GND

4

2A

2

7

1Y

1B

GND

5

4

2A

3 6

2B

2Y

2 7

1Y

1B

8

V

CC

1

1A

DESCRIPTION/ORDERING INFORMATION

The SN74LVC2G08 performs the Boolean function Y + A • B or Y + A ) B in positive logic.

SN74LVC2G08

DUAL 2-INPUT POSITIVE-AND GATE

SCES198L – APRIL 1999 – REVISED JANUARY 2007

• Available in the Texas Instruments

• Typical V

OHV (Output VOH Undershoot) >2 V at

NanoFree™ Package

V

CC = 3.3 V, TA = 25°C

• Supports 5-V V

CC Operation

• I

off Supports Partial-Power-Down Mode

Operation

• Inputs Accept Voltages to 5.5 V

• Latch-Up Performance Exceeds 100 mA Per

• Max t

pd of 4.7 ns at 3.3 V

JESD 78, Class II

• Low Power Consumption, 10-µA Max I

CC

• ESD Protection Exceeds JESD 22

• ±24-mA Output Drive at 3.3 V

–

2000-V Human-Body Model (A114-A)

• Typical V

OLP (Output Ground Bounce) <0.8 V

–

1000-V Charged-Device Model (C101)

at V

CC = 3.3 V, TA = 25°C

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

TA

PACKAGE(1)

ORDERABLE PART NUMBER

TOP-SIDE MARKING(2)

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP

Reel of 3000

SN74LVC2G08YZPR

_ _ _CE_

(Pb-free)

–40

°C to 85°C

SSOP – DCT

Reel of 3000

SN74LVC2G08DCTR

C08_ _ _

Reel of 3000

SN74LVC2G08DCUR

VSSOP – DCU

C08_

Reel of 250

SN74LVC2G08DCUT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

类似零件编号 - SN74LVC2G08DCTRG4

制造商	部件名	数据表	功能描述
Texas Instruments	SN74LVC2G08DCTRG4	928Kb / 22P	Dual 2-Input Positive-AND Gate
	SN74LVC2G08DCTRG4	731Kb / 26P	SN74LVC2G08 Dual 2-Input Positive-AND Gate REVISED DECEMBER 2015
	SN74LVC2G08DCTRG4.B	731Kb / 26P	SN74LVC2G08 Dual 2-Input Positive-AND Gate REVISED DECEMBER 2015

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类似说明 - SN74LVC2G08DCTRG4

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