1A

1Y

1

6

2A

2Y

3

4

Absolute Maximum Ratings

(1)

SN74LVC2G17

ORDERING INFORMATION

ORDERABLE

TOP-SIDE

PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC2G17YZPR

_ _ _C7_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC2G17DBVR

SOT (SOT-23) – DBV

C17_

–40°C to 85°C

Reel of 250

SN74LVC2G17DBVT

Reel of 3000

SN74LVC2G17DCKR

SOT (SC-70) – DCK

C7_

Reel of 250

SN74LVC2G17DCKT

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(3)

DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

FUNCTION TABLE

(EACH INVERTER)

INPUT

OUTPUT

A

Y

H

H

L

L

LOGIC DIAGRAM (POSITIVE LOGIC)

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Supply voltage range

–0.5

6.5

V

–0.5

6.5

V

–0.5

6.5

V

–0.5

V

Input clamp current

–50

mA

Output clamp current

–50

mA

Continuous output current

±50

mA

±100

mA

DBV package

165

θ

JA

DCK package

259

°C/W

YZP package

123

Junction temperature under bias

150

°C

Storage temperature range

–65

150

°C

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

(3)

(4)

The package thermal impedance is calculated in accordance with JESD 51-7.

2

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