www.ti.com

FEATURES

DCT OR DCU PACKAGE

(TOP VIEW)

1

2

3

4

8

7

6

5

A1

A2

GND

B1

B2

DIR

YZP PACKAGE

(BOTTOM VIEW)

A1

GND

B1

DIR

A2

B2

2

8

3

4

6

7

1

5

A1

A2

B2

C2

D2

B1

C1

D1

DESCRIPTION/ORDERING INFORMATION

SN74LVC2T45

DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES516I – DECEMBER 2003 – REVISED MARCH 2007

• Available in the Texas Instruments

NanoFree™ Package

• Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.65-V to

5.5-V Power-Supply Range

• V

GND, Both Ports Are in the High-Impedance

State

• DIR Input Circuit Referenced to V

CCA

• Low Power Consumption, 10-µA Max I

CC

• ±24-mA Output Drive at 3.3 V

• I

Operation

• Max Data Rates

–

420 Mbps (3.3-V to 5-V Translation)

–

210 Mbps (Translate to 3.3 V)

–

140 Mbps (Translate to 2.5 V)

–

75 Mbps (Translate to 1.8 V)

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

–

4000-V Human-Body Model (A114-A)

–

200-V Machine Model (A115-A)

–

1000-V Charged-Device Model (C101)

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is

translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree – WCSP (DSBGA)

Reel of 3000

SN74LVC2T45YZPR

_ _ _TB_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC2T45DCTR

SSOP – DCT

CT2_ _ _

–40

°C to 85°C

Reel of 250

SN74LVC2T45DCTT

Reel of 3000

SN74LVC2T45DCUR

VSSOP – DCU

CT2_

Reel of 250

SN74LVC2T45DCUT

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2003–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.