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SN74LVC74APWRE4 数据表(PDF) 5 Page - Texas Instruments

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部件名 SN74LVC74APWRE4
功能描述  DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
PDF  19 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

SN74LVC74APWRE4 数据表(HTML) 5 Page - Texas Instruments

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Timing Requirements
Switching Characteristics
Switching Characteristics
Operating Characteristics
SN54LVC74A, SN74LVC74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SCAS287S – JANUARY 1993 – REVISED MAY 2005
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN74LVC74A
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 2.7 V
UNIT
± 0.15 V
± 0.2 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
83
83
83
150
MHz
PRE or CLR low
4.1
3.3
3.3
3.3
tw
Pulse duration
ns
CLK high or low
4.1
3.3
3.3
3.3
Data
3.6
2.3
3.4
3
tsu
Setup time before CLK
ns
PRE or CLR inactive
2.7
1.9
2.2
2
th
Hold time, data after CLK
1
1
1
0
ns
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN54LVC74A
FROM
TO
VCC = 3.3 V
PARAMETER
VCC = 2.7 V
UNIT
(INPUT)
(OUTPUT)
± 0.3 V
MIN
MAX
MIN
MAX
fmax
83
100
MHz
CLK
6
1
5.2
tpd
Q or Q
ns
PRE or CLR
6.4
1
5.4
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN74LVC74A
FROM
TO
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
PARAMETER
VCC = 2.7 V
UNIT
(INPUT)
(OUTPUT)
± 0.15 V
± 0.2 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fmax
83
83
83
150
MHz
CLK
1
7.1
1
4.4
1
6
1
5.2
tpd
Q or Q
ns
PRE or CLR
1
6.9
1
4.6
1
6.4
1
5.4
tsk(o)
1
ns
T
A = 25°C
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
TEST
PARAMETER
UNIT
CONDITIONS
TYP
TYP
TYP
Cpd
Power dissipation capacitance per flip-flop
f = 10 MHz
24
24
26
pF
5



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