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INA333 数据表(PDF) 12 Page - Texas Instruments |
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INA333 数据表(HTML) 12 Page - Texas Instruments |
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12 / 25 page ![]() NOISE PERFORMANCE INTERNAL OFFSET CORRECTION INPUT BIAS CURRENT RETURN PATH OFFSET TRIMMING 10kW OPA333 ±10mV AdjustmentRange 100W 100W 100 A m 1/2REF200 100 A m 1/2REF200 V+ V- R G INA333 Ref V O V IN- V IN+ INA333 SBOS445B – JULY 2008 – REVISED OCTOBER 2008 ..................................................................................................................................................... www.ti.com Table 1. Commonly-Used Gains and Resistor Values DESIRED GAIN RG (Ω) NEAREST 1% RG (Ω) 1 NC(1) NC 2 100k 100k 5 25k 24.9k 10 11.1k 11k 20 5.26k 5.23k 50 2.04k 2.05 100 1.01k 1k 200 502.5 499 500 200.4 200 1000 100.1 100 (1) NC denotes no connection. When using the SPICE model, the simulation will not converge unless a resistor is connected to the RG pins; use a very large resistor value. The auto-calibration technique used by the INA333 The INA333 internal op amps use an auto-calibration results in reduced low frequency noise, typically only technique with a time-continuous 350kHz op amp in 50nV/ √Hz, (G = 100). The spectral noise density can the signal path. The amplifier is zero-corrected every be seen in detail in Figure 8. Low frequency noise of 8 µs using a proprietary technique. Upon power-up, the INA333 is approximately 1 µV PP measured from the amplifier requires approximately 100 µs to achieve 0.1Hz to 10Hz, (G = 100). specified VOS accuracy. This design has no aliasing or flicker noise. The input impedance of the INA333 is extremely high—approximately 100G Ω. However, a path must Most applications require no external offset be provided for the input bias current of both inputs. adjustment; however, if necessary, adjustments can This input bias current is typically ±70pA. High input be made by applying a voltage to the REF terminal. impedance means that this input bias current Figure 33 shows an optional circuit for trimming the changes very little with varying input voltage. output offset voltage. The voltage applied to REF terminal is summed at the output. The op amp buffer Input circuitry must provide a path for this input bias provides low impedance at the REF terminal to current for proper operation. Figure 34 illustrates preserve good common-mode rejection. various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential that exceeds the common-mode range of the INA333, and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 34). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage as a result of bias current and better high-frequency common-mode rejection. Figure 33. Optional Trimming of Output Offset Voltage 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): INA333 |
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