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Preliminary
2-207
RF2196
Rev A0 010518
2
Application Schematic
US - CDMA
15
16
1
2
3
4
12
11
10
9
8
7
6
5
14
13
3.6 pF
15 pF
RF IN
4.7 pF
2.2 pF
15 pF
RF OUT
2.5 nH
2.2 pF
15 pF
10 nF
Pins 1 and 9 are internally grounded to the die flag.
TL
1
TL
2
15 pF
Jumper
VREG
1k
Ω
VMODE
12 nH
15 pF
Jumper
15 pF
VCC
11 pF
Ferrite
10
Ω
Bypassing for
V
REG1 and VREG2
Bias return
Matching network for
optimum load impedance
Interstage tuning for centering
frequency response
RF Choke - Bias inductor
for the amplifier interstage
TL
3
Matching network for
optimum input return loss
4.7
µF
Bypassing for V
CC
1
µF
+
10 nF
1
µF
+
TL4
CDMA (US)
Transmission
Line Length
15 mils
TL
3
200 mils
TL
4
140 mils
TL
2
30 mils
TL
1
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