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Preliminary
3-33
RF3320
Rev A10 010514
3
Evaluation Board Schematic
PCB Layout Considerations
The RF3320 Evaluation board can be used as a guide for the layout in your application. Care should be taken in laying
out the RF3320 in other applications. The RF3320 will have similar results if the following guidelines are taken into con-
sideration:
•
Make sure underside of package is soldered to a good ground on the PCB.
•
Keep input and output traces as short as possible.
•
Ensure a good ground plane by using multiple vias to the ground plane.
•
Use a low noise power supply along with decoupling capacitors.
C3
1nF
C4
1nF
T2
4:1
C9
100 pF
C8
15 pF
C7
15 pF
R5
24
Ω
J7
RF OUT
VCC2
T1
1:1
R4
75
Ω
R3
75
Ω
J6
RF IN
VCC1
C5
0.1
µF
SDA
CS
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
R1
100 k
Ω
R2
100 k
Ω
VCC
NC
CS
SDA
SCLK
SHDNB
TXEN
NC
NC
GND
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
NC
NC
NC
NC
NC
NC
CS
SDA
J5-1
J3-1
SCLK
J1
J3
1
2
3
J1-6
TXEN
J2
1
2
3
VCC
GND
J5
1
2
3
J1-5
SHDNB
J4
1
2
3
VCC
GND
JP1
1
2
VCC
GND
+
C2
1nF
L1 (Ferrite)
30
Ω
C1
10
µF
(10 V)
L3 (Ferrite)
30
Ω
L4 (Ferrite)
30
Ω
L2 (Ferrite)
30
Ω
VCC
VCC1
VCC2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Power
Control
Gain Control
and Serial Bus
PACKAGE BASE
C6
220 pF
Notes:
1. 4-layer board.
2. Underside of package must solder to ground.
3. Place C5 and C6 as close to pin as possible.
4. C1 is tantalum, size code Y.
5. All other components are 0603 size.
6. Replace R5 with 0
Ω resistor if 75 Ω connector is used.
3320400B
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