6-63
RF9938
Rev A3 010720
6
Application Schematic
Pin
Function
Description
Interface Schematic
1IF+
Balanced IF Input Pin. This pin is internally DC biased and should be
DC blocked if connected to a device with a DC level present. For single-
ended input operation, one pin is used as an input and the other IF
input is AC coupled to ground. The balanced, as well as single-ended,
input impedance is 265
Ω.
2IF-
Same as pin 1, except complementary input.
3GND
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
4LO+
Balanced LO Input Pin. This pin is internally DC biased and should be
DC blocked if connected to a device with a DC level present. For single-
ended input operation, one pin is used as an input and the other LO
input is AC coupled to ground. The balanced, as well as single-ended,
input impedance is 50
Ω.
5LO-
Same as pin 4, except complementary input.
6GND
Same as pin 3.
7VCC
Supply Voltage pin. External bypassing is required. External RF, LO,
and IF bypassing is required. The trace length between the pin and the
bypass capacitors should be minimized. The ground side of the bypass
capacitors should connect immediately to ground plane.
8RF OUT
RF Output Pin. This pin is internally DC blocked. The output impedance
is 50
Ω.
1
2
3
4
8
7
6
5
RF OUT
1nF
IF+
1nF
IF-
33 pF
LO IN
47 pF
100 nF
V
CC
10 pF
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