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SA2005F 数据表(PDF) 5 Page - Sames |
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SA2005F 数据表(HTML) 5 Page - Sames |
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5 / 10 page ![]() 5/10 sames sames SA2005F http://www.sames.co.za Voltage Sense Inputs (IVN1, IVN2, IVN3) The current into the voltage sense inputs (virtual ground) should be set to 14µA at rated voltage conditions. The RMS individual mains voltages are divided down to 14V per RMS phase. The resistors R8, R9 and R10 set the current for the voltage sense inputs. The voltage sense inputs saturate at an input current of ±25µA peak. Pulse Programming Inputs (PGM0, PGM1) The pulse programming inputs PGM1 and PGM0 define the representation of energy measured by the device on FOUT. The table below shows the difference between the various modes. DIR as a logic 1. The DIR pin may be used to drive a LED in order to indicate reverse energy flow. Frequency Output (FOUT) The sum of the measured power, from the three phases produce a pulse rate of 64Hz or 1160Hz (mode 3), at rated conditions on FOUT. The format of the pulse output signal, which provides power/energy and direction information is shown in figure 4. Refer to Pulse Programming Inputs for pulse widths. The following equation may be used for calculating the output frequency: f = 11.16 x FOUTX x ((I x I )+(I x I )+(I x I )) / 3 x I I1 V1 I2 V2 I3 V3 R Where: FOUTX = Nominal rated frequency (64Hz/1160Hz) I , I , I = Input currents for current sensor inputs (16µA at rated I1 I2 I3 line current) I , I , I = Input currents for voltage sensor inputs (14µA at V1 V2 V3 rated line voltage) I = Reference current (typically 50µA) R An integrated anti-creep function ensures that no pulses are generated at zero line currents. ELECTROSTATIC DISCHARGE (ESD) PROTECTION The SA2005F integrated circuit's inputs/outputs are protected against ESD. POWER CONSUMPTION The overall power consumption rating of the SA2005F integrated circuit is less than 50 mW with a 5V supply. Figure 4: FOUT options Note: Frequency of pulse rate in MODE 3 is 18 times higher than other modes Mode PGM1 PGM0 Frequency at rated conditions Forward Pulse Width Reverse Pulse Width 0 1 2 3 0 0 1 1 0 1 0 1 64Hz 64Hz 64Hz 1160Hz 1.14ms 1.14ms 1.14ms 71µs 3.4ms 1.14ms 1.14ms 71µs Test Inputs (TCLK, TEST) The TEST and TCLK inputs are manufacturers test pins and must be connected to VSS in a metering application. OUTPUT SIGNALS Direction Indication (DIRO) The SA2005F indicates the measured energy flow direction on pin DIR. A logic 0 on pin DIR indicates reverse energy flow. Reverse energy flow is defined as the condition where the voltage sense input and current sense input are out of phase (greater than 90 degrees). Positive energy flow, when voltage sense and current sense input are in phase, is indicated on pin MODE 0 FOUT MODE1 FOUT MODE2 FOUT MODE3 FOUT DIR DR-01582 |
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