THS7364IPWR datasheet(32/47 Pages) TI

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THS7364

SBOS530 – AUGUST 2010

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One other issue that must be taken into account is

to 100% yellow for P’B signal or 100% cyan for P’R

the dc-bias point is a function of the power supply. As

signal . Because the P’B and P’R signal voltage can

such, there is an impact on system PSRR. To help

be lower than the sync voltage, there exists a

reduce this impact, the input capacitor combines with

potential for clipping of the signal for a short period of

the pull-up resistance to function as a low-pass filter.

time if the signals drop below the sync voltage.

Additionally, the time to charge the capacitor to the

The THS7364 does include a 150-mV input level

final dc bias point is a function of the pull-up resistor

shift, or 300 mV at the output, that should mitigate

and the input capacitor size. Lastly, the input

any clipping issues. For example, if a STC is used,

capacitor forms a high-pass filter with the parallel

then the bottom of the sync is 300 mV at the output.

impedance of the pull-up resistor and the 800-k

Ω

If the signal does go the lowest level, or 50 mV lower

resistor. In general, it is good to have this high-pass

than the sync at the input, then the instantaneous

filter at approximately 3 Hz to minimize any potential

output is (–50 mV + 150 mV) × 2 = 200 mV at the

droop on a P’B or P’R signal. A 0.1-mF input capacitor

output.

with

3.3-M

Ω

pull-up

resistor

equates

approximately a 2.5-Hz high-pass corner frequency.

Another potential risk is that if this signal (100%

yellow for P’B or 100% cyan for P’R) exists for several

This mode of operation is recommended for use with

pixels, then the STC circuit engages to raise the

chroma (C’), P’B, P’R, U’, and V’ signals. This method

voltage back to 0 V at the input. This function can

can also be used with sync signals if desired. The

cause a 50-mV level shift at the input midway through

benefit of using the STC function over the ac-bias

the active video signal. This effect is undesirable and

configuration on embedded sync signals is that the

can cause errors in the decoding of the signal.

STC maintains a constant back-porch voltage as

opposed to a back-porch voltage that fluctuates

It is therefore recommended to use ac bias mode for

depending

the

video

content.

Because

the

component P’B and P’R signals when ac-coupling is

high-pass corner frequency is a very low 2.5 Hz, the

desired.

impact on the video signal is negligible relative to the

STC configuration.

OUTPUT MODE OF OPERATION:

One question may arise over the P’B and P’R

DC-COUPLED

channels. For 480i, 576i, 480p, and 576p signals, a

The THS7364 incorporates a rail-to-rail output stage

sync may or may not be present. If no sync exists

that can be used to drive the line directly without the

within the signal, then it is obvious that ac-bias is the

need for large ac-coupling capacitors. This design

preferred method of ac-coupling the signal.

offers

the

best

line

tilt

and

field

tilt

(droop)

For 720p, 1080i, and 1080p signals, or for the the

performance because no ac-coupling occurs. Keep in

480i, 576i, 480p, and 576p signals with sync present

mind that if the input is ac-coupled, then the resulting

on the P’B and P’R channels, the lowest voltage of the

tilt as a result of the input ac-coupling continues to be

sync is –300 mV below the midpoint reference

seen on the output, regardless of the output coupling.

voltage of 0 V. The P’B and P’R signals allow a signal

The 80-mA output current drive capability of the

to be as low as –350 mV below the midpoint

THS7364 is designed to drive two video lines

reference voltage of 0 V. This allowance corresponds

simultaneously—essentially,

75-

Ω

load—while

keeping the output dynamic range as wide as

possible. Figure 81 shows the THS7364 driving two

video lines while keeping the output dc-coupled.

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