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ADA4800ACPZ-R7 数据表(PDF) 11 Page - Analog Devices

部件名 ADA4800ACPZ-R7
功能描述  Low Power, High Speed CCD Buffer Amplifier
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4800ACPZ-R7 数据表(HTML) 11 Page - Analog Devices

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ADA4800
Rev. A | Page 11 of 16
APPLICATIONS INFORMATION
OPEN SOURCE CCD OUTPUT BUFFER
With low power, high slew rate, and fast settling time, the
ADA4800 is the ideal solution for an output buffer for CCD
sensors with an open source output configuration. Figure 21
shows a typical application circuit for the ADA4800 as a CCD
sensor output buffer.
The output of the CCD is connected directly to the IN pin
of the ADA4800, whose OUT pin is then ac-coupled into
the input of the analog front end.
IN
VEE
OUT
CCD
AFE
15V
ADA4800
IAL
IBUFF
+1
IIDRV
IISF
6
ISF
1
5
VCC
2
4
IDRV
3
RISF
120k
15V
VISF
RIDRV
249k
0.1µF
0.1µF
0.1µF
47µF
+
Figure 21. Typical Application Block Diagram
To help reduce the effects of power supply noise coupling into
the ISF and IDRV pins, use 0.1 μF ceramic bypass decoupling
capacitors. For best performance, place these capacitors as
close to each of these pins as is physically possible.
POWER SAVE MODE
The buffer of the ADA4800 consumes only 20 mW of static
power. To achieve even more power savings, the ADA4800
active load current can be switched off during standby mode
or reduced during monitoring mode. Figure 22 illustrates the
ADA4800 as an open source CCD buffer configured for using
this power save feature. Power save mode allows IAL current to
be logically controlled by connecting the ISF pin to any general-
purpose output (GPO) pin of the system microcontroller through
an external resistor. A GPO logic high enables the flow of input
sink current, while a logic low disables the input sink current
and asserts the power save mode.
0V TO 3V
GPO PIN
IN
VEE
OUT
CCD
AFE
15V
ADA4800
IAL
IBUFF
+1
IIDRV
IISF
6
ISF
1
5
VCC
2
4
IDRV
3
RISF
10k
VISF
RIDRV
249k
0.1µF
0.1µF
0.1µF
47µF
+
Figure 22. Using GPO to Drive ISF Voltage
Figure 23 shows an example of the ADA4800 power save feature.
AFE
GPO1
GPO2
20k
20k
MAIN BOARD
FPC
ADA4800
ISF
Figure 23. Example Block Diagram for Sink Current Selection
Three combinations of IAL are provided with Figure 23.
Selection of the IAL is controlled by the logic signals applied to
the GPO1 and GPO2 pins. Table 5 summarizes the IAL selections.
Table 5. Input Sink Current Selection
Mode
GPO1
GPO2
Resistance (kΩ)
Active Load Current, IAL (mA)
Standby
High-Z
High-Z
High-Z
0
0
0
N/A
Sleep
High-Z
1
20
1.90
1
High-Z
20
Active
1
1
10
3.36



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