ADP2119/ADP2120

Rev. 0 | Page 16 of 24

THEORY OF OPERATION

The ADP2119/ADP2120 are step-down, dc-to-dc regulators

that use a fixed frequency, peak current mode architecture with

integrated high-side switch and low-side synchronous rectifier.

The high switching frequency and tiny 10-lead, 3 mm × 3 mm

LFCSP_WD package provide a small step-down dc-to-dc regulator

solution. The integrated high-side switch (P-channel MOSFET)

and synchronous rectifier (N-channel MOSFET) yield high

efficiency at medium-to-full loads while light load efficiency

is improved using the PFM mode.

The ADP2119/ADP2120 support input voltages from 2.3 V

to 5.5 V and regulate the output voltage down to 0.6 V. The

ADP2119/ADP2120 are also available with preset output

voltage options of 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, and 1.0 V.

CONTROL SCHEME

The ADP2119/ADP2120 use a fixed frequency, peak current

mode PWM control architecture and operate in PWM mode

for medium-to-full loads but shift to PFM mode (if enabled) at

light loads to maintain high efficiency. When operating in fixed

frequency PWM mode, the duty cycle of the integrated switches

is adjusted to regulate the output voltage. When operating in

PFM mode at light loads, the switching frequency is adjusted

to regulate the output voltage.

The ADP2119/ADP2120 operate in PWM mode when the load

current is greater than the pulse-skipping threshold current. At

load currents below this value, the regulator smoothly transitions

to the PFM mode of operation.

PWM MODE OPERATION

In PWM mode, the ADP2119/ADP2120 operate at a fixed

frequency. At the start of each oscillator cycle, the P-channel

MOSFET switch is turned on, putting a positive voltage across

the inductor. Current in the inductor increases until the current

sense signal crosses the peak inductor current level, turns off

the P-channel MOSFET switch, and turns on the N-channel

MOSFET synchronous rectifier. This puts a negative voltage

across the inductor, causing the inductor current to decrease.

The synchronous rectifier stays on for the rest of the cycle or

until the inductor current reaches zero, which causes the zero-

crossing comparator to turn off the N-channel MOSFET as well.

of a transconductance error amplifier that compares the feedback

voltage with an internal 0.6 V reference.

PFM MODE OPERATION

When PFM mode is enabled, the regulator smoothly transitions

to the variable frequency PFM mode of operation when the load

current decreases below the pulse-skipping threshold current.

Switching continues only as necessary to maintain the output

voltage within regulation. When the output voltage drops below

regulation, the part enters PWM mode for a few oscillator cycles to

increase the output voltage back to regulation. During the wait

time between bursts, both power switches are off, and the output

capacitor supplies the load current. Because the output voltage

dips and recovers occasionally, the output voltage ripple in this

mode is larger than the ripple in the PWM mode of operation.

SLOPE COMPENSATION

Slope compensation stabilizes the internal current control loop

of the ADP2119/ADP2120 when operating close to and beyond

the 50% duty cycle to prevent subharmonic oscillations. Slope

compensation is implemented by summing an artificial voltage

ramp to the current sense signal during the on-time of the P-channel

MOSFET switch. This voltage ramp depends on the output voltage.

When operating at high output voltages, there is more slope

compensation. The slope compensation ramp value determines

the minimum inductor that can be used to prevent subharmonic

oscillations.

ENABLE/SHUTDOWN

The EN input pin has a precision analog threshold of 1.2 V (typical)

with 100 mV of hysteresis. When the enable voltage exceeds 1.2 V,

the regulator turns on, and when it falls below 1.1 V (typical),

the regulator turns off. To force the part to automatically start

when input power is applied, connect EN to VIN.

When the ADP2119/ADP2120 are shut down, the soft start

capacitor is discharged. This causes a new soft start cycle to

begin when the part is reenabled.

An internal pull-down resistor (1 MΩ) prevents an accidental

enable if EN is left floating.

INTEGRATED SOFT START

The ADP2119/ADP2120 include integrated soft start circuitry

to limit the output voltage rise time and reduce inrush current

at startup. The soft start time is fixed at 1024 clock cycles.

If the output voltage is precharged prior to turn-on, the part

prevents reverse inductor current (which would discharge the

output capacitor) by keeping both MOSFETs turned off until

the soft start voltage exceeds the voltage on the FB pin.