L36C datasheet(13/75 Pages) RENESAS

13 / 75 page

R8C/L35C Group, R8C/L36C Group, R8C/L38C Group, R8C/L3AC Group

1. Overview

REJ03B0293-0100 Rev.1.00

Page 13 of 72

Jun 25, 2010

Figure 1.7

Block Diagram of R8C/L38C Group

Watchdog timer

(14 bits)

System clock generation

circuit

XIN-XOUT

High-speed on-chip oscillator

Low-speed on-chip oscillator

XCIN-XCOUT

RAM (2)

Multiplier

Timers

Timer RA (8 bits

× 1)

Timer RB (8 bits

× 1)

Timer RC (16 bits

× 1)

Timer RD (16 bits

× 2)

Timer RE (8 bits

× 1)

Timer RG (16 bits

× 1)

R8C CPU core

Memory

R0H

R0L

R1H

R1L

USP

ISP

INTB

FLG

I/O ports

Notes:

1. ROM capacity varies with MCU type.

2. RAM capacity varies with MCU type.

A/D converter

(10 bits

× 16 channels)

UART or

clock synchronous serial I/O

(8 bits

× 3)

I2C bus or SSU

(8 bits

× 1)

LIN module

Port P0

Port P3

Port P4

Port P2

ROM (1)

Peripheral functions

LCD drive control circuit

Common output: Max. 8 pins

Segment output: Max. 48 pins

D/A converter

(8 bits

× 2 channels)

Comparator B

DTC

Port P1

Port P6

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