MCP6401RT-ESLASHSL datasheet(14/38 Pages) MICROCHIP

14 / 38 page

MCP6401/1R/1U/2/4

DS22229B-page 14

4.2

Rail-to-Rail Output

The output voltage range of the MCP6401/1R/1U/2/4

op amps is VSS + 20 mV (minimum) and VDD – 20 mV

(maximum) when RL =10kΩ is connected to VDD/2

and VDD = 6.0V. Refer to Figures 2-23 and 2-24 for

more information.

4.3

Capacitive Loads

Driving large capacitive loads can cause stability

problems for voltage feedback op amps. As the load

capacitance increases, the feedback loop’s phase

margin decreases and the closed-loop bandwidth is

reduced. This produces gain peaking in the frequency

response, with overshoot and ringing in the step

response. While a unity-gain buffer (G = +1 V/V) is the

most sensitive to capacitive loads, all gains show the

same general behavior.

When driving large capacitive loads with these op

amps (e.g., > 100 pF when G = +1 V/V), a small series

resistor at the output (RISO in Figure 4-4) improves the

feedback loop’s phase margin (stability) by making the

output load resistive at higher frequencies. The

bandwidth will be generally lower than the bandwidth

with no capacitance load.

FIGURE 4-4:

Output Resistor, RISO

Stabilizes Large Capacitive Loads.

Figure 4-5

gives

recommended RISO values for

different capacitive loads and gains. The x-axis is the

normalized load capacitance (CL/GN), where GN is the

circuit's noise gain. For non-inverting gains, GN and the

Signal Gain are equal. For inverting gains, GN is

1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).

FIGURE 4-5:

Recommended RISO Values

for Capacitive Loads.

After selecting RISO for your circuit, double-check the

resulting

frequency

response

peaking

and

step

response overshoot. Modify RISO’s value until the

response

reasonable.

Bench

evaluation

and

simulations with the MCP6401/1R/1U/2/4 SPICE

macro model are very helpful.

4.4

Supply Bypass

With this family of operational amplifiers, the power

supply pin (VDD for single-supply) should have a local

bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm

for good high frequency performance. It can use a bulk

capacitor (i.e., 1 µF or larger) within 100 mm to provide

large, slow currents. This bulk capacitor can be shared

with other analog parts.

4.5

Unused Op Amps

An unused op amp in a quad package (MCP6404)

should be configured as shown in Figure 4-6. These

circuits prevent the output from toggling and causing

crosstalk. Circuits A sets the op amp at its minimum

noise gain. The resistor divider produces any desired

reference voltage within the output voltage range of the

op amp; the op amp buffers that reference voltage.

Circuit B uses the minimum number of components

and operates as a comparator, but it may draw more

current.

FIGURE 4-6:

Unused Op Amps.

4.6

PCB Surface Leakage

In applications where low input bias current is critical,

Printed Circuit Board (PCB) surface leakage effects

need to be considered. Surface leakage is caused by

humidity, dust or other contamination on the board.

Under low humidity conditions, a typical resistance

between nearby traces is 1012

Ω. A 5V difference would

cause 5 pA of current to flow; which is greater than the

MCP6401/1R/1U/2/4 family’s bias current at +25°C

(±1.0 pA, typical).

VIN

RISO

VOUT

–

MCP640x

100

1000

10000

1.E-11

1.E-10

1.E-09

1.E-08

1.E-07

1.E-06

Normalized Load Capacitance; CL/GN (F)

GN:

1 V/V

2 V/V

≥ 5 V/V

VDD = 6.0 V

RL = 10 kΩ

10p

100p

10n

0.1µ

1µ

VDD

¼ MCP6404 (A)

¼ MCP6404 (B)

VDD

VREF

REF

------------------

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