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AMF2803R3S/CH 数据表(PDF) 5 Page - International Rectifier

部件名 AMF2803R3S/CH
功能描述  HYBRID - HIGH RELIABILITY RADIATION TOLERANT DC/DC CONVERTER
PDF  7 Pages
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制造商  IRF [International Rectifier]
网页  http://www.irf.com
标志 IRF - International Rectifier

AMF2803R3S/CH 数据表(HTML) 5 Page - International Rectifier

  AMF2803R3S/CH Datasheet HTML 1Page - International Rectifier AMF2803R3S/CH Datasheet HTML 2Page - International Rectifier AMF2803R3S/CH Datasheet HTML 3Page - International Rectifier AMF2803R3S/CH Datasheet HTML 4Page - International Rectifier AMF2803R3S/CH Datasheet HTML 5Page - International Rectifier AMF2803R3S/CH Datasheet HTML 6Page - International Rectifier AMF2803R3S/CH Datasheet HTML 7Page - International Rectifier  
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5
AMF28XXS Series
Block Diagram
Application Information
Inhibit Function (Enable)
EMI Filter
Device Synchronization
Notes to Specifications
Connecting the enable input (Pin 1) to input common
(Pin 7) will cause the converter to shut down. It is
recommended that the enable pin be driven by an
open collector device capable of sinking at least
400
µA of current. The open circuit voltage of the
enable input is 10 +1.0 V
DC.
An optional EMI filter is available (AFH461) that will
reduce the input ripple current to levels below the
limits imposed by MIL-STD-461 CE03.
When multiple DC/DC converters are utilized in a
single system, significant low frequency noise may
be generated due to a small difference in the
switching frequency of the converters (beat
frequency noise). Because of the low frequency
nature of this noise (typically less than 10 KHz), it is
difficult to filter out and may interfere with proper
operation of sensitive systems (communication,
radar or telemetry). Interenational Rectifier provides
synchronization of multiple AMF type converters to
match switching frequency of the converter to the
frequency of the system clock, thus eliminating this
type of noise.
1 Parameter guaranteed by line and load regulation tests.
2 Bandwidth guaranteed by design. Tested for 20Hz to 2.0MHz.
3 Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of
the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing
as a short circuit during turn on.
4 Parameter shall be tested as part of design characterization and after design or process changes. Therefore this Parameters shall
be guaranteed to the limit specified.
5 Load step transition time between 2.0 and 10 microseconds.
6 Recovery time is measured from the initiation of the transient to where V
OUT has returned to within ±1 % of VOUT at 50 percent load.
7 Input step transition time between 1.0 and 10 microseconds. Parameter guaranteed by design but not 100% tested.
8 Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the
inhibit pin while power is applied to the input.
3
4
+Output
Output
Return
Pulse Width
Modulator
Primary
Housekeeping
Supply
EMI
Filter
Under-Voltage
Detector
8
1
2
7
+Input
Enable
Sync
Input
Input
Return
Error
Amp &
Ref
FB
CS
Drive
6
Case



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