PCA2000UAC datasheet(13/30 Pages) NXP

13 / 30 page

PCA2000_2001

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Product data sheet

Rev. 08 — 23 August 2010

13 of 30

NXP Semiconductors

PCA2000; PCA2001

32 kHz watch circuit with programmable adaptive motor pulse

7.8 Checking memory content

The stored data of the OTP array can be checked bit wise by measuring the supply

current. The array word is selected by the instruction state and the bit is addressed by the

shift register.

To read a word, the word is first selected (td =t1), and a logic 1 is written into the first cell

of the shift register (td =t3). This logic 1 is then shifted through the entire shift register

(td =t2), so that it points with each clock pulse to the next bit.

If the addressed OTP cell contains a logic 1, a 30 k

Ω resistor is connected between V

and VSS, which increases the supply current accordingly.

Figure 8 shows the supply voltage modulation for reading word B, with the corresponding

supply current variation for word B = 110101 (sequence: first MSB and last LSB).

(1)

Fig 8.

Supply voltage modulation and corresponding supply current variation for

reading word B

VDD(nom)

VDD

VP(mod)

(1)

VSS

mgw357

IDD

t1 t1

VP(prog)(start)

tp(start)

VP(prog)(stop)

tp(stop)

ΔI

30 k

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