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LIS331DLM 数据表(PDF) 9 Page - STMicroelectronics |
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LIS331DLM 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 38 page ![]() LIS331DLM Mechanical and electrical specifications Doc ID 15102 Rev 4 9/38 2 Mechanical and electrical specifications 2.1 Mechanical characteristics Table 3. Mechanical characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted (1) Symbol Parameter Test conditions Min. Typ.(2) Max. Unit FS Measurement range(3) FS bit set to 00 ±2.0 g FS bit set to 01 ±4.0 FS bit set to 11 ±8.0 So Sensitivity FS bit set to 00 8 bit representation 64 LSB/ g FS bit set to 01 8 bit representation 32 FS bit set to 11 8 bit representation 16 Dres Device resolution FS bit set to 00 ODR = 50 Hz 16 m g TCSo Sensitivity change vs temperature FS bit set to 00 ±0.01 %/°C TyOff Typical zero- g level offset accuracy(4),(5) FS bit set to 00 ±40 mg TCOff Zero- g level change vs temperature Max delta from 25 °C ±0.5 m g/°C Vst Self-test output change(6),(7),(8) FS bit set to 00 X axis 317 32 LSb FS bit set to 00 Y axis -3 -17 -32 LSb FS bit set to 00 Z axis 317 32 LSb Top Operating temperature range -40 +85 °C Wh Product weight 20 mgram 1. The product is factory calibrated at 2.5 V. The operational power supply range is from 2.16 V to 3.6 V. 2. Typical specifications are not guaranteed 3. Verified by wafer level test and measurement of initial offset and sensitivity 4. Typical zero-g level offset value after MSL3 preconditioning 5. Offset can be eliminated by enabling the built-in high pass filter 6. The sign of “Self-test output change” is defined by CTRL_REG4 STsign bit ( Table 28), for all axes. 7. Self-test output changes with the power supply. “Self-test output change” is defined as OUTPUT[LSb](CTRL_REG4 ST bit=1) - OUTPUT[LSb](CTRL_REG4 ST bit=0). 1LSb=4g/256 at 8 bit representation, ±2 g full-scale 8. Output data reach 99% of final value after 1/ODR+1 ms when enabling self-test mode, due to device filtering |
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