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ST62T85B 数据表(PDF) 37 Page - STMicroelectronics |
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ST62T85B 数据表(HTML) 37 Page - STMicroelectronics |
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37 / 78 page  Obsolete Product(s) - Obsolete Product(s) 37/78 ST62T85B/E85B I/O PORTS (Cont’d) 4.1.3 SPI alternate functions PA6/Sin and PA5/Scl pins must be configured as input through the DDR and OR registers to be used as data in and data clock (Slave mode) for the SPI. All input modes are available and I/O's can be read independently of the SPI at any time. PA7/Sout must be configured in open drain output mode to be used as data out for the SPI. In output mode, the value present on the pin is the port data register content only if PA7 is defined as push pull output, while serial transmission is possible only in open drain mode. 4.1.4 UART alternate functions PB0/RXD1 pin must be configured as input through the DDR and OR registers to be used as reception line for the UART. All input modes are available and PB0 can be read independently of the UART at any time. PB1/TXD1 pin must be configured as output through the DDR and OR registers to be used as transmission line for the UART. Value present on the pin in output mode is the Data register content as long as no transmission is active. 37 |
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