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M95128-RMB3G/PC 数据表(PDF) 10 Page - STMicroelectronics |
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M95128-RMB3G/PC 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 44 page ![]() Signal description M95128, M95128-W, M95128-R 10/44 Doc ID 5798 Rev 13 3.6 Write Protect (W) The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status Register). This pin must be driven either high or low, and must be stable during all write instructions. 3.7 VSS ground VSS is the reference for the VCC supply voltage. 3.8 Supply voltage (VCC) 3.8.1 Operating supply voltage VCC Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Table 7, Table 8 and Table 9). This voltage must remain stable and valid until the end of the transmission of the instruction and, for a Write instruction, until the completion of the internal write cycle (tW). In order to secure a stable DC supply voltage, it is recommended to decouple the VCC line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the VCC/VSS package pins. 3.8.2 Device reset In order to prevent inadvertent write operations during power-up, a power-on-reset (POR) circuit is included. At power-up, the device does not respond to any instruction until VCC reaches the internal reset threshold voltage (this threshold is defined in DC tables 12, 13, 14 and 15 as VRES. When VCC passes over the POR threshold, the device is reset and in the following state: ● in Standby Power mode ● deselected (note that, to be executed, an instruction must be preceded by a falling edge on Chip Select (S)) ● Status register values: – the Write Enable Latch (WEL) bit is reset to 0 – the Write In Progress (WIP) bit is reset to 0 – the SRWD, BP1 and BP0 bits remain unchanged (non-volatile bits). When VCC passes over the POR threshold, the device is reset and enters the Standby Power mode. The device must not be accessed until VCC reaches a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range defined in Table 7, Table 8 and Table 9. |
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