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ADN2526ACPZ-R7 数据表(PDF) 11 Page - Analog Devices |
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ADN2526ACPZ-R7 数据表(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() ADN2526 Rev. A | Page 11 of 16 2Ω 2kΩ 100Ω IBIAS VCC VCC Figure 21. Equivalent Circuit of the IBIAS Pin VCC IBMON VCC 100Ω 500Ω VCC Figure 22. Equivalent Circuit of the IBMON Pin The recommended configuration for BSET, IBIAS, and IBMON is shown in Figure 23. ADN2526 BSET VBSET GND IBMON IBMON IBIAS TO LASER CATHODE L R 1kΩ IBIAS Figure 23. Recommended Configuration for the BSET, IBIAS, and IBMON Pins The circuit used to drive the BSET voltage must be able to drive the 1 kΩ input resistance of the BSET pin. For proper operation of the bias current source, the voltage at the IBIAS pin must be between the compliance voltage specifications for this pin over supply, temperature, and bias current range (see Table 1). The maximum compliance voltage is specified for only two bias current levels (10 mA and 100 mA), but it can be calculated for any bias current by VCOMPLIANCE_MAX (V) = VCC (V) − 0.75 − 4.4 × IBIAS (1) See the Applications Information section for examples of headroom calculations. The function of the inductor, L, is to isolate the capacitance of the IBIAS output from the high frequency signal path. For recommended components, see Table 7. AUTOMATIC LASER SHUTDOWN (ALS) The ALS pin is a digital input that enables/disables both the bias and modulation currents, depending on the logic state applied, as shown in Table 5. Table 5. ALS Functions ALS Logic State IBIAS and IMOD High Disabled Low Enabled Floating Enabled The ALS pin is compatible with 3.3 V CMOS and LVTTL logic levels. Its equivalent circuit is shown in Figure 24. VCC ALS VCC 100Ω 40kΩ 2kΩ Figure 24. Equivalent Circuit of the ALS Pin MODULATION CURRENT The modulation current can be controlled by applying a dc voltage to the MSET pin. This voltage is converted into a dc current by using a voltage-to-current converter using an operational amplifier and a bipolar transistor, as shown in Figure 25. 50Ω 200Ω 800Ω MSET GND IMODP IMODN ADN2526 VCC VO gm × VO FROM INPUT STAGE IMOD Figure 25. Generation of Modulation Current on the ADN2526 This dc current is switched by the data signal applied to the input stage (DATAP and DATAN pins) and amplified by the output stage to generate the differential modulation current at the IMODP and IMODN pins. The output stage also generates the active back-termination, which provides proper transmission line termination. Active back-termination uses feedback around an active circuit to synthesize a broadband termination resistance. This provides excellent transmission line termination, while dissipating less power than a traditional resistor passive back-termination. A small portion of the modulation current flows in the virtual 50 Ω active back-termination resistor. All of the preset IMOD modulation current, the range specified in Table 1, flows into the external load. The equivalent circuits for MSET, IMODP, and IMODN are shown in Figure 26 and Figure 27. The two 25 Ω resistors in Figure 27 are not actual resistors. They represent the active back-termination resistance. |
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