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M41ST87YMX6 数据表(PDF) 20 Page - STMicroelectronics |
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M41ST87YMX6 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 52 page ![]() Operating modes M41ST87Y, M41ST87W 20/52 Doc ID 9497 Rev 8 Figure 14. Tamper detect connection options Note: These options are summarized in Table 3. 1. If the CLRXEXT bit is set, a second tamper to VOUT (TPM2 = '1') during tCLR will not be detected. 2. If the CLRXEXT bit is set, a second tamper to VOUT (TPM2 = '1') will trigger automatically. 3. Optional external resistor to VCC allows the user to bypass sampling when power is “on.” Table 3. Tamper detection truth table Option Mode TCMX TPMX I Normally open/tamper to GND(1) 1. No battery current drawn during battery backup. 10 II Normally open/tamper to VOUT (1) 11 III Normally closed/tamper to GND 0 0 IV Normally closed/tamper to VOUT 01 AI07075 TPIN TAMPER HI (TPMX = 1) TAMPER LO (TPMX = 0) VOUT (1) TPIN NORMALLY CLOSED (TCMX = 0) NORMALLY OPEN (TCMX = 1) I. IV. II. III. TPIN VOUT (2) TCHI/TCLO = 0 TCHI/TCLO = 1 TCHI/TCLO = 0 TCHI/TCLO = 1 VOUT (Int) VCC (3) |
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