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STV2248 数据表(PDF) 51 Page - STMicroelectronics

部件名 STV2248
功能描述  I²C bus-controlled multistandard single chip TV processor
PDF  86 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STV2248 数据表(HTML) 51 Page - STMicroelectronics

Back Button STV2248 Datasheet HTML 47Page - STMicroelectronics STV2248 Datasheet HTML 48Page - STMicroelectronics STV2248 Datasheet HTML 49Page - STMicroelectronics STV2248 Datasheet HTML 50Page - STMicroelectronics STV2248 Datasheet HTML 51Page - STMicroelectronics STV2248 Datasheet HTML 52Page - STMicroelectronics STV2248 Datasheet HTML 53Page - STMicroelectronics STV2248 Datasheet HTML 54Page - STMicroelectronics STV2248 Datasheet HTML 55Page - STMicroelectronics Next Button
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Obsolete
Product(s)
- Obsolete
Product(s)
STV224X, STV228X, STV223X - I²C BUS SELECTION
51/86
6.3.7 Chroma Controls
0F
Peaking Control
4
X
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
0 dB at center Freq. Min. peaking.
+ 6dB at center Freq.Max. peaking.
Coring on sharp-
ness
1X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
0 = Coring off.
1 = Coring on.
Chroma Trap and
Luma Delay Selec-
tion
1X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
0 = Trap and Luma Delay Enabled.
1 = Trap and Luma Delay Disabled.
CVBS2 ON/OFF
1
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
0 = CVBS2 output Enabled.
1 = CVBS2 output Disabled.
White Insertion
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0 = White insertion not active.
1 = White insertion enable during HOUT soft mode.
10
APR Enable
1X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
0 = APR disable.
1 = APR enable.
Note: WR10 d0 to be set to 1 when RGB peak limi-
tation is used
APR Threshold
4
X
X
X
X
X
X
0
1
0
1
0
1
0
1
X
X
50 IRE.
100 IRE.
RGB OSD Con-
trast Selection
1X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
0 = Contrast control disable.
1 = Contrast control enable.
CRT/LCD Display
1
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
0 = RGB output blanking active, CRT Display
1 = RGB output blanking replaced by black level,
LCD Display
White Insertion
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
White Insertion controlled by WR0Fd7
White forced at RGB Output
Reg.
Addr
(Hex)
Description
Bits
Data
Comments
d7 d6 d5 d4 d3 d2 d1 d0
Reg.
Addr.
(Hex)
Description
Bits
Data
Comments
d7 d6 d5 d4 d3 d2 d1 d0
11
Bell Filter Adjust
5X
X
X
X
X
X
0
1
0
1
0
1
0
1
0
1
0kHz.
+100 kHz.
PAL/NTSC
Demodulation Gain
1X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
0 = 0 dB gain (nominal).
1 = +6 dB gain.
NTSC Matrix
1
X
X
0
1
X
X
X
X
X
X
X
X
X
X
X
X
0 = 90° matrix selection.
1 = 104° matrix selection (in NTSC only).
ACC Overload Disable
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0 = ACC overload active.
1 = ACC overload disable.
12
Bandpass adjust
4X
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
f = fosc.
f = 1.1*fosc.
Chroma reference out-
put
1X
X
X
X
X
X
0
1
X
X
X
X
X
X
X
X
0 = Chroma reference output OFF.
1 = Chroma reference output ON.
Chroma DL selection
1X
X
X
X
0
1
X
X
X
X
X
X
X
X
X
X
0 = ON.
1 = OFF.
Not to be used
2
0
0
XXXXXX



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