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CDK1307 数据表(PDF) 9 Page - Cadeka Microcircuits LLC.

部件名 CDK1307
功能描述  Ultra Low Power, 10/20/40/65/80/100MSPS, 12/13-bit Analog-to-Digital Converters (ADCs)
PDF  15 Pages
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制造商  CADEKA [Cadeka Microcircuits LLC.]
网页  http://www.cadeka.com
标志 CADEKA - Cadeka Microcircuits LLC.

CDK1307 数据表(HTML) 9 Page - Cadeka Microcircuits LLC.

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©2009 CADEKA Microcircuits LLC
www.cadeka.com
9
Data Sheet
Electrical Characteristics - CDK1307D
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 80MSPS clock, 50% clock duty cycle,
-1dBFS 8MHz input signal, 13-bit output, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Performance
SNR
Signal to Noise Ratio
FIN = 8MHz
70.4
72
dBFS
FIN = 20MHz
71.7
dBFS
FIN = 30MHz
71.2
dBFS
FIN ≃ FS/2
70.7
dBFS
SINAD
Signal to Noise and Distortion Ratio
FIN = 8MHz
69.5
70.5
dBFS
FIN = 20MHz
70.5
dBFS
FIN = 30MHz
70.5
dBFS
FIN ≃ FS/2
70.3
dBFS
SFDR
Spurious Free Dynamic Range
FIN = 8MHz
74
77
dBc
FIN = 20MHz
78
dBc
FIN = 30MHz
78
dBc
FIN ≃ FS/2
78
dBc
HD2
Second order Harmonic Distortion
FIN = 8MHz
-80
-95
dBc
FIN = 20MHz
-90
dBc
FIN = 30MHz
-90
dBc
FIN ≃ FS/2
-85
dBc
HD3
Third order Harmonic Distortion
FIN = 8MHz
-74
-77
dBc
FIN = 20MHz
-78
dBc
FIN = 30MHz
-78
dBc
FIN ≃ FS/2
-78
dBc
ENOB
Effective number of Bits
FIN = 8MHz
11.3
11.4
bits
FIN = 20MHz
11.4
bits
FIN = 30MHz
11.4
bits
FIN ≃ FS/2
11.4
bits
Power Supply
AIDD
Analog Supply Current
24.5
mA
DIDD
Digital Supply Current
Digital core supply
2.9
mA
OIDD
Output Driver Supply
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT enabled
6.1
mA
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT disabled
4.1
mA
Analog Power Dissipation
44.1
mW
Digital Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
15.5
mW
Total Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
59.6
mW
Power Down Dissipation
9.1
μW
Sleep Mode
Power Dissipation, Sleep mode
24.1
mW
Clock Inputs
Max. Conversion Rate
80
MSPS
Min. Conversion Rate
65
MSPS



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