Data Sheet

©2009 CADEKA Microcircuits LLC

www.cadeka.com

10

needs to be subtracted from the total power delivered by

the supplies.

Supply power is calculated by the standard power

equation.

Power delivered to a purely resistive load is:

the effect of the feedback network. For instance,

These measurements are basic and are relatively easy to

perform with standard lab equipment. For design purposes

however, prior knowledge of actual signal levels and load

impedance is needed to determine the dissipated power.

power can be calculated as above with the desired signal

amplitudes using:

The dynamic power is focused primarily within the output

stage driving the load. This value can be calculated as:

Assuming the load is referenced in the middle of the

Figure 4 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the packages

available.

0

0.5

1

1.5

2

-40

-20

0

20

40

60

80

Ambient Temperature (°C)

SOT23-5

SOIC-8

MSOP-8

SOT23-6

Figure 4. Maximum Power Derating

Input Common Mode Voltage

The common mode input range extends to 250mV below

ground and to 250mV above Vs, in single supply operation.

Exceeding these values will not cause phase reversal.

However, if the input voltage exceeds the rails by more

than 0.5V, the input ESD devices will begin to conduct. The

output will stay at the rail during this overdrive condition.

If the absolute maximum input voltage (700mV beyond

either rail) is exceeded, externally limit the input current to

±5mA as shown in Figure 5.

Output

Input

10k

Figure 5. Circuit for Input Current Protection

Driving Capacitive Loads

Increased phase delay at the output due to capacitive

loading can cause ringing, peaking in the frequency

response, and possible unstable behavior. Use a series

help improve stability and settling performance. Refer to

Figure 6.