ST10F272Z2_08 datasheet(26/189 Pages) STMICROELECTRONICS

26 / 189 page

Internal Flash memory

ST10F272Z2

26/189

Internal Flash memory

5.1

Overview

The on-chip Flash is composed by one matrix module, 256 KBytes wide.

This module is on ST10 Internal bus, so it is called IFLASH

Figure 5.

Flash structure

The programming operations of the flash are managed by an embedded Flash

Program/Erase Controller (FPEC). The High Voltages needed for Program/Erase operations

are internally generated.

The Data bus is 32-bit wide for fetch accesses to IFLASH, while it is 16 bit wide for read

accesses to IFLASH. Read/write accesses to IFLASH Control Registers area are 16 bit

wide.

5.2

Functional description

5.2.1

Structure

The following table shows the Address space reserved to the Flash module.

Flash Control

Bank 0: 256 Kbyte

Program Memory

HV and Ref.

Generator

Program/Erase

Controller

I-BUS Interface

8 Kbyte Test-Flash

IFLASH

Control Section

Registers

Table 4.

Address space reserved to the Flash module

Description

Addresses

Size

IFLASH sectors

0x00 0000 to 0x04 FFFF

256 Kbyte

Reserved IBUS area

0x05 0000 to 0x07 FFFF

192 Kbyte

Registers and Flash internal reserved area

0x08 0000 to 0x08 FFFF

64 Kbyte

ST10F272Z2 数据表(PDF) 26 Page - STMicroelectronics

ST10F272Z2 数据表(HTML) 26 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载