M41T83RM6F datasheet(19/61 Pages) STMICROELECTRONICS

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M41T82-M41T83

Clock operation

Doc ID 12578 Rev 12

19/61

Clock operation

The M41T8x is driven by a quartz-controlled oscillator with a nominal frequency of

32.768 kHz. The accuracy of the real-time clock depends on the frequency of the quartz

crystal that is used as the time-base for the RTC.

The 8-byte clock register (see Table 2 on page 21 and Table 4 on page 23) is used to both

set the clock and to read the date and time from the clock, in binary coded decimal format.

Tenths/hundredths of seconds, seconds, minutes, and hours are contained within the first

four registers.

Bit D7 of register 01h contains the STOP bit (ST). Setting this bit to a '1' will cause the

oscillator to stop. When reset to a 0 the oscillator restarts within one second (typical).

Note:

Upon initial power-up, the user should set the ST bit to a '1,' then immediately reset the ST

bit to 0. This provides an additional “kick-start” to the oscillator circuit.

Bits D6 and D7 of clock register 03h (century/ hours register) contain the CENTURY bit 0

(CB0) and CENTURY bit 1 (CB1). Bits D0 through D2 of register 04h contain the day (day of

week). Registers 05h, 06h, and 07h contain the date (day of month), month, and years. The

ninth clock register is the digital calibration register, while the analog calibration register is

found at address 12h (these are both described in Section 3.4: Clock calibration). The RTC

includes an oscillator fail detect circuit which sets the OF bit in the flags register (bit 2,

oscillator fail interrupt enable bit (OFIE) which can be used to enable an interrupt when the

OF bit is set (see Section 3.12: Oscillator fail detection on page 40) will also generate an

interrupt output.

Note:

A WRITE to ANY location within the first eight bytes of the clock register (00h-07h),

including the ST bit and CB0-CB1 bits will result in an update of the RTC counters and a

reset of the divider chain. This could result in an inadvertent change of the current time. For

example, the ST bit is in the seconds register (address 01h) and the century bits (CB0-CB1)

are in the hours register (address 03h), so the user should take care to not alter these other

parameters when changing the ST bit or the century bits.

The eight clock registers may be read one byte at a time or in a sequential block. At the start

of a read cycle, a copy of the time/date counters is placed in the buffer/transfer registers and

can then be transferred out sequentially without concern that the time/date increments

during the transfer and thus yields a corrupt value. For example, if the user were to read the

seconds register, then start another bus cycle to read the minutes register, the minutes

counter could have incremented during the time between the two read cycles. The seconds

and minutes values would not be from the same instant in time; they would not be coherent.

By using the sequential read feature, the values shifted out are from the same instant in time

and are thus coherent.

Similarly, when writing to the RTC registers, during one write cycle, the user can

sequentially transfer all eight bytes of time/date into the buffer/transfer registers whereupon

they will be loaded simultaneously into the RTC counters thus ensuring a coherent update

of the time/date.

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