PCA9620 datasheet(49/71 Pages) NXP

49 / 71 page

PCA9620

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Product data sheet

Rev. 1 — 9 December 2010

49 of 71

NXP Semiconductors

PCA9620

Universal LCD driver for low multiplex rates

I2C-bus interface characteristics

The I2C-bus is for bidirectional, two-line communication between different ICs or modules.

The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must

be connected to a positive supply via a pull-up resistor when connected to the output

stages of a device. Data transfer may be initiated only when the bus is not busy.

8.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain

stable during the HIGH period of the clock pulse as changes in the data line at this time

will be interpreted as a control signal (see Figure 43).

8.2 START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy.

A HIGH-to-LOW change of the data line, while the clock is HIGH is defined as the START

condition (S).

A LOW-to-HIGH change of the data line while the clock is HIGH is defined as the STOP

condition (P).

The START and STOP conditions are shown in Figure 44.

8.3 System configuration

A device generating a message is a transmitter; a device receiving a message is the

receiver. The device that controls the message is the master; and the devices which are

controlled by the master are the slaves. The system configuration is shown in Figure 45.

Fig 43. Bit transfer

mba607

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Fig 44. Definition of START and STOP conditions

mbc622

SDA

SCL

STOP condition

SDA

SCL

START condition

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