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MPC8315ECVRAGDA 数据表(PDF) 71 Page - Freescale Semiconductor, Inc |
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MPC8315ECVRAGDA 数据表(HTML) 71 Page - Freescale Semiconductor, Inc |
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71 / 112 page ![]() MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0 Freescale Semiconductor 71 Serial ATA (SATA) Figure 52. Compliance Test/Measurement Load 17 Serial ATA (SATA) The serial ATA (SATA) of the MPC8315E is designed to comply with Serial ATA 2.5 Specification. Note that the external cabled applications or long backplane applications (Gen1x & Gen2x) are not supported. 17.1 Requirements for SATA REF_CLK The reference clock for MPC8315E is a single ended input clock required for the SATA Interface operation. The AC requirements for the SATA reference clock are listed in the Table 56. Table 56. Reference Clock Input Requirements Parameter Symbol Conditions Min Typical Max Unit Notes Frequency range tCLK_REF — 50 75 150 MHz 1 Clock frequency tolerance tCLK_TOL — -350 0 +350 ppm — Input High Voltage VCLK_INHI —2.0 — — V — Input Low Voltage VCLK_INLo —— — 0.7 V — Reference clock rise and fall time tCLK_RISE/ tCLK_FALL 20% to 80% of nominal amplitude — — 2 ns — Reference clock duty cycle tCLK_DUTY measured at 1.6V 40 50 60 % — |
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